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path: root/src/arch/alpha/isa.hh
AgeCommit message (Expand)Author
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2014-01-24arch: Make all register index flattening constAndreas Hansson
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-02-19scons: Add warning for overloaded virtual functionsAndreas Hansson
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2011-04-15includes: sort all includesNathan Binkert
2011-03-26mips: cleanup ISA-specific codeKorey Sewell
2010-10-10SPARC: Make SPARC's ISA's clear function initialize everything it should.Gabe Black
2010-10-10Alpha: Force all the IPRs to an initial, determinstic value when cleared.Gabe Black
2009-10-17ISA: Fix compilation.Gabe Black
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Alpha: Pull the MiscRegFile fully into the ISA object.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black