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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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Age
Commit message (
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Author
2010-11-08
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2009-12-20
Alpha: Implement MVI and remaining BWX instructions.
Soumyaroop Roy
2009-11-10
Mem: Eliminate the NO_FAULT request flag.
Gabe Black
2009-06-04
types: clean up types, especially signed vs unsigned
Nathan Binkert
2009-04-19
Memory: Rename LOCKED for load locked store conditional to LLSC.
Gabe Black
2009-02-26
CPA: Add new object for gathering critical path annotations.
Ali Saidi
2009-01-24
pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.
Nathan Binkert
2008-12-17
Make Alpha pseudo-insts available from SE mode.
Steve Reinhardt
2008-11-10
pseudo inst: Add rpns (read processor nanoseconds) instruction.
Nathan Binkert
2008-10-20
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...
Ali Saidi
2008-10-11
CPU: Eliminate the simPalCheck funciton.
Gabe Black
2008-10-11
CPU: Eliminate the hwrei function.
Gabe Black
2008-09-27
alpha: Clean up namespace usage.
Nathan Binkert
2008-07-11
m5ops: clean up the m5ops stuff.
Nathan Binkert
2007-07-31
Add a flag to indicate an instruction triggers a syscall in SE mode.
Gabe Black
2007-03-23
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2007-03-23
Make hardware loads/stores serializing; they need to avoid certain out-of-ord...
Kevin Lim
2007-03-07
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
Ali Saidi
2007-02-21
add pseduo instruction support for sparc
Ali Saidi
2007-02-12
Move store conditional result checking from SimpleAtomicCpu write
Steve Reinhardt
2006-11-24
Add no-op versions of ivlb and ivle back in for backwards compatibility.
Steve Reinhardt
2006-11-06
Got rid of obsolete ivlb and ivle psuedo instructions.
Gabe Black
2006-11-01
Fix a range check on the ipr_index.
Gabe Black
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-10-31
Arg!
Gabe Black
2006-10-31
More typos! I need to get nfs to work.
Gabe Black
2006-10-31
Fix another typo
Gabe Black
2006-10-31
Check for out of range IPR values as well.
Gabe Black
2006-10-31
Make two simple utility functions to determine if a MiscReg index correspondi...
Gabe Black
2006-10-31
Forgot to change the index.
Gabe Black
2006-10-31
Make the IPRs use regular miscreg indexes, and make a table or two to find th...
Gabe Black
2006-10-31
Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...
Gabe Black
2006-10-06
there are two main thrusts of this changeset.
Lisa Hsu
2006-09-30
Merge ktlim@zamp:./local/clean/o3-merge/m5
Kevin Lim
2006-09-11
add annotation code to m5
Ali Saidi
2006-06-16
Add in exec_context.hh, which is a file for documentation purposes only. It ...
Kevin Lim
2006-06-13
Make syscalls serialize after instructions so they work properly on the new C...
Kevin Lim
2006-06-12
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-06-12
Fixes for checker. The RC/RS instructions check the interrupt flag, which is...
Kevin Lim
2006-06-09
Merge vm1.(none):/home/stever/bk/newmem
Steve Reinhardt
2006-06-09
Move main control from C++ into Python.
Steve Reinhardt
2006-06-06
Change ExecContext to ThreadContext. This is being renamed to differentiate ...
Kevin Lim
2006-06-02
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Merge ktlim@zizzer:/bk/m5
Kevin Lim
2006-05-28
Remove authors from copyright.
Ali Saidi
2006-05-22
New directory structure:
Steve Reinhardt