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path: root/src/arch/alpha/isa/mem.isa
AgeCommit message (Expand)Author
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-06-19alpha: fix warn_once for prefetchesKorey Sewell
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-10-22ISA: Simplify various implementations of completeAcc.Gabe Black
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2009-11-10Mem: Eliminate the NO_FAULT request flag.Gabe Black
2009-05-12inorder-tlb-cunit: merge the TLB as implicit to any memory accessKorey Sewell
2009-05-12inorder-mem: skeleton support for prefetch/writehintsKorey Sewell
2009-05-12inorder/alpha-isa: create eaComp object visible to StaticInst through ISAKorey Sewell
2009-05-12inorder-alpha-port: initial inorder support of ALPHAKorey Sewell
2008-11-14Fix a bunch of bugs I introduced when I changed the flags stuff for packets.Nathan Binkert
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2007-02-12Merge zizzer:/bk/newmemAli Saidi
2007-02-12rename store conditional stuff as extra data so it can be used for conditiona...Ali Saidi
2007-02-12Move store conditional result checking from SimpleAtomicCpu writeSteve Reinhardt
2006-12-17Convert Alpha (and finish converting MIPS) to newSteve Reinhardt
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-09-30Merge ktlim@zamp:./local/clean/o3-merge/m5Kevin Lim
2006-07-23This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...Korey Sewell
2006-05-31Updated Authors from bk prs infoAli Saidi
2006-05-28Remove authors from copyright.Ali Saidi
2006-05-22New directory structure:Steve Reinhardt