Age | Commit message (Collapse) | Author |
|
--HG--
rename : src/sim/host.hh => src/base/types.hh
|
|
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions
* * *
Remove namespace from header file. Causes compiler issues that are hard to find
* * *
Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time
* * *
Expose memory access size and flags through instruction object
(temporarily memAccSize and memFlags to get TLB stuff working.)
|
|
|
|
|
|
should configure their editors to not insert tabs
|
|
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
|
|
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
|
|
--HG--
extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
|
|
specific DepTag constants.
--HG--
extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
|