Age | Commit message (Collapse) | Author |
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into zower.eecs.umich.edu:/eecshome/m5/newmem
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
Hand Merge
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extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
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--HG--
extra : convert_revision : 58e960e5019f944c7ec5606e4b8c93ce42330719
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into ewok.(none):/home/gblack/m5/newmemo3
src/sim/byteswap.hh:
Hand Merge
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extra : convert_revision : 640d33ad0c416934e8a5107768e7f1dce6709ca8
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small fix so ALPHA_FS will build on macs
interrupts.hh:
small fix for alpha compile
src/arch/alpha/interrupts.hh:
small fix for alpha compile
src/arch/alpha/pagetable.hh:
small fix so ALPHA_FS will build on macs
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extra : convert_revision : 5fdbc68caa706d652b51807ac8f6bf58bcf72bdc
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--HG--
extra : convert_revision : d08b740d32757fa5471c9bcde9084d59a1d8102d
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automatically by the miscreg enum. I need to figure out how to do that without including the whole miscregfile.hh and making header spaghetti.
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extra : convert_revision : eb640c9ef10a188b96f6a079f91abc8f67b9d38c
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--HG--
extra : convert_revision : 6e0913903d4cbda6f31bec3b5d725b9c08dc1419
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untested.
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extra : convert_revision : 3ad9a3368961d5e9e71f702da84ffe293fe8adc8
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InstObjParam interface.
src/arch/alpha/isa/branch.isa:
src/arch/alpha/isa/fp.isa:
src/arch/alpha/isa/int.isa:
src/arch/alpha/isa/main.isa:
src/arch/alpha/isa/mem.isa:
src/arch/alpha/isa/pal.isa:
src/arch/mips/isa/formats/mem.isa:
src/arch/mips/isa/formats/util.isa:
Get rid of CodeBlock calls to adapt to new InstObjParam interface.
src/arch/isa_parser.py:
Check template code for operands (in addition to snippets).
src/cpu/o3/alpha/dyn_inst.hh:
Add (read|write)MiscRegOperand calls to Alpha DynInst.
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extra : convert_revision : 332caf1bee19b014cb62c1ed9e793e793334c8ee
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into zower.eecs.umich.edu:/eecshome/m5/newmem
src/arch/isa_parser.py:
src/arch/sparc/isa/formats/mem/basicmem.isa:
src/arch/sparc/isa/formats/mem/blockmem.isa:
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/cpu/o3/iew_impl.hh:
Hand Merge
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extra : convert_revision : ae1b25cde85ab8ec275a09d554acd372887d4d47
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into zed.eecs.umich.edu:/z/hsul/work/m5/newmem
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extra : convert_revision : 92a865a90a7c3e251ed1443f79640f761b359c1d
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fix namespace indentations
src/arch/alpha/tlb.cc:
fix namespace indentations
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extra : convert_revision : 327d5a1568ba60cab1c1ae4bb3963ea78dfe0176
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extra : convert_revision : 4fdffe01b8e63e24b97a2e4194c747e6cf5e25ba
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RegFile *.
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extra : convert_revision : 021a1fe6760df1daf6299d46060371a5310f008a
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extra : convert_revision : 5ed79ed18e443118a28d6890327c55a6a3fcd325
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miscregs into the integer register file so they get renamed.
src/arch/alpha/syscallreturn.hh:
src/arch/mips/syscallreturn.hh:
src/sim/syscallreturn.hh:
Move the SyscallReturn class into sim/syscallreturn.hh
src/arch/sparc/faults.cc:
src/arch/sparc/isa/operands.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/arch/sparc/process.cc:
src/arch/sparc/sparc_traits.hh:
Move some miscregs into the integer register file so they get renamed.
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extra : convert_revision : df5b94fa1e7fdca34816084e0a423d6fdf86c79b
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into zeep.pool:/z/saidi/work/m5.newmem
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extra : convert_revision : c358d5e3211756bbf905eef2a62b65a2e56a86f3
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src/arch/SConscript:
add mmaped_ipr.hh to switch headers
src/arch/sparc/asi.hh:
make ASI_IMPLICT=0 so by default nothing needs to be done
src/arch/sparc/miscregfile.hh:
miscregfile no longer needs to include asi.hh
src/arch/sparc/tlb.cc:
src/arch/sparc/tlb.hh:
implement panic instructions for mmaped ipr reads
src/cpu/simple/atomic.cc:
add check for mmaped iprs and handle them if it exists
src/mem/request.hh:
allocate space in the flags for mmaped iprs. Put in in the first 8 bits so that by default its fast. Move the other flags up 8 bits
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extra : convert_revision : 31255b0494588c4d06a727fe35241121d741b115
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--HG--
extra : convert_revision : 383b72c130b20f3d7cde4e08fa36a481f3c0bf7c
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--HG--
extra : convert_revision : 2dd830c6b3b5df894608b7596250b0181a3dfdf0
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--HG--
extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
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into vm1.(none):/home/stever/bk/newmem-head
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extra : convert_revision : faab7569deefde94c20133b2f70a8567bcaa2960
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--HG--
extra : convert_revision : 88fdaa403fe6d083f8c8fc064cb0d0d6a8b8daf8
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into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix
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extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
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src/arch/alpha/interrupts.hh:
No need for this now that the ThreadContext is being used to set these IPRs in interrupts.
Also split up the interrupt checking from the updating of the IPL and interrupt summary.
src/arch/alpha/tlb.cc:
Check the PC for whether or not it's in PAL mode, not the addr.
src/cpu/o3/alpha/cpu.hh:
Split up getting the interrupt from actually processing the interrupt.
src/cpu/o3/alpha/cpu_impl.hh:
Splut up the processing of interrupts.
src/cpu/o3/commit_impl.hh:
Update for ISA-oriented interrupt changes.
src/cpu/o3/fetch_impl.hh:
Fix broken if statement from PcPAL updates, and properly populate the request fields.
Also more debugging output.
src/cpu/ozone/cpu_impl.hh:
Updates for ISA-oriented interrupt stuff.
src/cpu/ozone/front_end_impl.hh:
Populate request fields properly.
src/cpu/simple/base.cc:
Update for interrupt stuff.
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extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
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src/arch/alpha/faults.hh:
Only use pagetable.hh in FS
src/arch/alpha/pagetable.hh:
pagetable.hh should only be included in FS, so protecting it internally should be unnecessary.
src/cpu/exetrace.cc:
Only use tlb.hh in FS
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extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
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--HG--
extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
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constants.hh and isa_traits.cc
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extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880
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--HG--
extra : convert_revision : 164bdcec2860c5dca3f0f11d189781b88dd717cb
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specific DepTag constants.
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extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
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--HG--
extra : convert_revision : 10c50c2d45a8e510d71cccde520059363116da8a
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--HG--
extra : convert_revision : b5b7cdf4a5e5e54228c592093516bf18d0f7dbe6
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--HG--
extra : convert_revision : 1626703583f02a1c9823874290462c1b6bdb6c3c
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--HG--
extra : convert_revision : 4f45a4b48e3993ac6991db2afffbce2e666eab6c
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--HG--
rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc
rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh
rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc
rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh
rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh
rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc
rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh
extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
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--HG--
extra : convert_revision : 8c528fab56a95b8245ad0f2572d62bb556ce0dde
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ISA independent by making it use the #define for branch delay slots (and NNPC)
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extra : convert_revision : b2631b1163397ecc99f2f315e2b88537e2002731
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base kernel_stats to base_kernel_stats
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extra : convert_revision : 2a010d2eb7ea2586ff063b99b8bcde6eb1e8e017
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--HG--
extra : convert_revision : c3c2dd5a6e7181ad94194146d7fa2b33b21074fb
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but isn't tested. Other architectures will not.
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extra : convert_revision : fc7e1e73e2f3b1a4ab9905a1eb98c5f07c6c8707
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from TheISA:: rather than AlphaISA::
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extra : convert_revision : 17c143d3cbc2f58a7a9d01366a8f649810ff7f33
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Alpha and SPARC and put SConscripts in them.
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rename : src/base/kgdb.h => src/arch/alpha/kgdb.h
rename : src/dev/alpha_access.h => src/dev/alpha/access.h
rename : src/dev/alpha_console.cc => src/dev/alpha/console.cc
rename : src/dev/alpha_console.hh => src/dev/alpha/console.hh
extra : convert_revision : a7dd466308cb83edc40528689aacb72413089cdf
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are in PAL mode, however.
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extra : convert_revision : b52d9642efc474eaf97437fa2df879efefa0062b
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records when interrupts are requested, and returns an interrupt to execute if the
--HG--
extra : convert_revision : c535000a6a170caefd441687b60f940513d29739
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into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix
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extra : convert_revision : a9a41e2c292bd95aa148e1cf4d9a77c0622a462b
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src/arch/alpha/utility.hh:
For now makeExtMI will be specific to the ISA.
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extra : convert_revision : 89959c6499efcc3df9301ad8ea039580764a1496
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--HG--
extra : convert_revision : 84e25abd4bb2de0c877c883804d39feb019c7030
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file functions to not take faults
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extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
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--HG--
extra : convert_revision : 8328d002780c0291e7eb264076a62084de88b7a5
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--HG--
extra : convert_revision : f5693e96d376254f777fb0cce7b5be3d36efbea9
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