| Age | Commit message (Expand) | Author |
|---|
| 2016-03-17 | syscall_emul: add many Linux kernel flags | Brandon Potter |
| 2016-03-17 | syscall_emul: rename OpenFlagTransTable struct | Brandon Potter |
| 2016-02-06 | style: fix missing spaces in control statements | Steve Reinhardt |
| 2016-02-06 | style: remove trailing whitespace | Steve Reinhardt |
| 2016-01-17 | cpu. arch: add initiateMemRead() to ExecContext interface | Steve Reinhardt |
| 2016-01-17 | arch: get rid of unused LargestRead typedef | Steve Reinhardt |
| 2016-01-17 | sim: don't ignore SIG_TRAP | Steve Reinhardt |
| 2016-01-11 | scons: Enable -Wextra by default | Andreas Hansson |
| 2016-01-07 | pseudo inst,util: Add optional key to initparam pseudo instruction | Gabor Dozsa |
| 2015-12-18 | arm: remote GDB: rationalize structure of register offsets | Boris Shingarov |
| 2015-10-12 | misc: Add explicit overrides and fix other clang >= 3.5 issues | Andreas Hansson |
| 2015-10-12 | misc: Remove redundant compiler-specific defines | Andreas Hansson |
| 2015-10-09 | isa: Add parameter to pick different decoder inside ISA | Rekai Gonzalez Alberquilla |
| 2015-09-30 | isa,cpu: Add support for FS SMT Interrupts | Mitch Hayenga |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2015-07-07 | sim: Refactor the serialization base class | Andreas Sandberg |
| 2015-05-05 | mem, cpu: Add a separate flag for strictly ordered memory | Andreas Sandberg |
| 2015-05-05 | mem, alpha: Move Alpha-specific request flags | Andreas Sandberg |
| 2015-02-16 | arch: Make readMiscRegNoEffect const throughout | Andreas Hansson |
| 2015-02-11 | sim: Move the BaseTLB to src/arch/generic/ | Andreas Sandberg |
| 2015-01-25 | cpu: Remove all notion that we know when the cpu is misspeculating. | Ali Saidi |
| 2014-12-05 | misc: Generalize GDB single stepping. | Gabe Black |
| 2014-12-05 | misc: Make the GDB register cache accessible in various sized chunks. | Gabe Black |
| 2014-12-02 | cpu: Always mask the snoop address when performing lock check | Andreas Hansson |
| 2014-11-23 | mem: Page Table map api modification | Alexandru Dutu |
| 2014-11-23 | kvm, x86: Adding support for SE mode execution | Alexandru Dutu |
| 2014-10-22 | sim: revert 6709bbcf564d | Nilay Vaish |
| 2014-10-20 | sim: implement getdents/getdents64 in user mode | Michael Adler |
| 2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
| 2014-09-27 | arch: Use const StaticInstPtr references where possible | Andreas Hansson |
| 2014-09-20 | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate | Mitch Hayenga |
| 2014-09-03 | arch: Cleanup unused ISA traits constants | Andreas Hansson |
| 2014-08-28 | mem: adding architectural page table support for SE mode | Alexandru |
| 2014-06-30 | power: Add basic DVFS support for gem5 | Stephan Diestelhorst |
| 2014-05-12 | syscall emulation: clean up & comment SyscallReturn | Steve Reinhardt |
| 2014-05-09 | arch: teach ISA parser how to split code across files | Curtis Dunham |
| 2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
| 2014-05-09 | arch: remove inline specifiers on all inst constrs, all ISAs | Curtis Dunham |
| 2014-03-12 | alpha: Small removal of dead comments/code from alpha ISA | Paul Rosenfeld |
| 2014-01-24 | arch: Make all register index flattening const | Andreas Hansson |
| 2014-01-24 | arch, cpu: Add support for flattening misc register indexes. | Ali Saidi |
| 2014-01-24 | cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo... | Ali Saidi |
| 2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
| 2013-10-15 | cpu: rename *_DepTag constants to *_Reg_Base | Steve Reinhardt |
| 2013-10-15 | isa: clean up register constants | Steve Reinhardt |
| 2013-09-30 | arch: Add support for m5ops using mmapped IPRs | Andreas Sandberg |
| 2013-09-04 | alpha: Move system virtProxy to Alpha only | Andreas Hansson |
| 2013-08-19 | alpha: Check interrupts before quiesce | Andreas Hansson |
| 2013-06-27 | sim: Add the notion of clock domains to all ClockedObjects | Akash Bagdia |
