gem5 - gem5

Age	Commit message (Expand)	Author
2009-04-19	Memory: Rename LOCKED for load locked store conditional to LLSC.	Gabe Black
2009-04-08	alpha: get rid of all turbolaser remnants	Nathan Binkert
2009-04-08	tlb: More fixing of unified TLB	Nathan Binkert
2009-04-08	tlb: Don't separate the TLB classes into an instruction TLB and a data TLB	Gabe Black
2009-03-05	stats: Fix all stats usages to deal with template fixes	Nathan Binkert
2009-03-05	Get rid of 'using namespace' declarations in headers.	Steve Reinhardt
2009-02-28	Fix Num_Syscall_Descs check bug in non-x86 ISAs.	Steve Reinhardt
2009-02-27	Processes: Make getting and setting system call arguments part of a process o...	Gabe Black
2009-02-26	CPA: Add code to automatically record function symbols as CPU executes.	Ali Saidi
2009-02-26	CPA: Add new object for gathering critical path annotations.	Ali Saidi
2009-02-25	ISA: Get rid of the get*RegName functions.	Gabe Black
2009-02-25	CPU: Implement translateTiming which defers to translateAtomic, and convert t...	Gabe Black
2009-02-25	ISA: Replace the translate functions in the TLBs with translateAtomic.	Gabe Black
2009-02-23	debug: Move debug_break into src/base	Nathan Binkert
2009-02-16	sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has bee...	Lisa Hsu
2009-02-09	scons: Require SCons version 0.98.1	Nathan Binkert
2009-01-25	CPU: Add a setCPU function to the interrupt objects.	Gabe Black
2009-01-24	pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.	Nathan Binkert
2008-12-17	Make Alpha pseudo-insts available from SE mode.	Steve Reinhardt
2008-12-07	imported patch aux-fix.patch	Lisa Hsu
2008-12-06	flags: Change naming of functions to be clearer	Nathan Binkert
2008-12-05	This brings M5 closer to modernity - the kernel being advertised is newer so ...	Lisa Hsu
2008-11-15	syscalls: fix latent brk/obreak bug.	Steve Reinhardt
2008-11-14	Fix a bunch of bugs I introduced when I changed the flags stuff for packets.	Nathan Binkert
2008-11-10	pseudo inst: Add rpns (read processor nanoseconds) instruction.	Nathan Binkert
2008-11-10	mem: update stuff for changes to Packet and Request	Nathan Binkert
2008-11-02	Add in Context IDs to the simulator. From now on, cpuId is almost never used,	Lisa Hsu
2008-11-02	Make it so that all thread contexts are registered with the System, even in	Lisa Hsu
2008-11-02	make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered	Lisa Hsu
2008-10-21	style: Use the correct m5 style for things relating to interrupts.	Nathan Binkert
2008-10-20	O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...	Ali Saidi
2008-10-12	Get rid of old RegContext code.	Gabe Black
2008-10-12	CPU: Create a microcode ROM object in the CPU which is defined by the ISA.	Gabe Black
2008-10-12	Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...	Gabe Black
2008-10-12	CPU: Eliminate the get_vec function.	Gabe Black
2008-10-11	CPU: Eliminate the simPalCheck funciton.	Gabe Black
2008-10-11	CPU: Eliminate the hwrei function.	Gabe Black
2008-10-10	TLB: Make all tlbs derive from a common base class in both python and C++.	Gabe Black
2008-10-10	misc: remove #include <cassert> from misc.hh since not everyone needs it.	Nathan Binkert
2008-10-09	SimObjects: Clean up handling of C++ namespaces.	Nathan Binkert
2008-10-09	eventq: convert all usage of events to use the new API.	Nathan Binkert
2008-09-29	alpha: Need to include cstring so that g++ 4.3 works.	Nathan Binkert
2008-09-27	gcc: Add extra parens to quell warnings.	Nathan Binkert
2008-09-27	style: Make a style pass over the whole arch/alpha directory.	Nathan Binkert
2008-09-27	alpha: Clean up namespace usage.	Nathan Binkert
2008-09-27	arch: TheISA shouldn't really ever be used in the arch directory.	Nathan Binkert
2008-09-27	alpha: Get rid fo the namespace called EV5.	Nathan Binkert
2008-09-27	style	Nathan Binkert
2008-09-22	style	Nathan Binkert
2008-09-19	We're using the static keyword improperly in some cases.	Nathan Binkert