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2006-11-10Actually finished moving the register file stuff around.Gabe Black
--HG-- extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
2006-11-10Moved the Alpha float regfile into it's own regfile and got rid of ↵Gabe Black
constants.hh and isa_traits.cc --HG-- extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880
2006-11-10Split out alpha integer register file into it's own files.Gabe Black
--HG-- extra : convert_revision : 164bdcec2860c5dca3f0f11d189781b88dd717cb
2006-11-09Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha ↵Gabe Black
specific DepTag constants. --HG-- extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
2006-11-08Make a function to say how big gdbregs is in bytes vs. regs.Gabe Black
--HG-- extra : convert_revision : 10c50c2d45a8e510d71cccde520059363116da8a
2006-11-08Move the check to see if you're in user mode into the isa directory.Gabe Black
--HG-- extra : convert_revision : b5b7cdf4a5e5e54228c592093516bf18d0f7dbe6
2006-11-08Put the ProcessInfo and StackTrace objects into the ISA namespaces.Gabe Black
--HG-- extra : convert_revision : 1626703583f02a1c9823874290462c1b6bdb6c3c
2006-11-07Force remote gdb code to use signal numbers and not ISA specific trap numbers.Gabe Black
--HG-- extra : convert_revision : 4f45a4b48e3993ac6991db2afffbce2e666eab6c
2006-11-07Put kernel_stats back into arch.Gabe Black
--HG-- rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
2006-11-07Broke remote_gdb into a base class and architecture specific derived classes.Gabe Black
--HG-- extra : convert_revision : 8c528fab56a95b8245ad0f2572d62bb556ce0dde
2006-11-07Moved the idle event out of system_events.hh. The skipFuncEvent can be made ↵Gabe Black
ISA independent by making it use the #define for branch delay slots (and NNPC) --HG-- extra : convert_revision : b2631b1163397ecc99f2f315e2b88537e2002731
2006-11-07Moved the switched version of kernel_stats.hh back to kern, and moved the ↵Gabe Black
base kernel_stats to base_kernel_stats --HG-- extra : convert_revision : 2a010d2eb7ea2586ff063b99b8bcde6eb1e8e017
2006-11-06Got rid of obsolete ivlb and ivle psuedo instructions.Gabe Black
--HG-- extra : convert_revision : c3c2dd5a6e7181ad94194146d7fa2b33b21074fb
2006-11-06Remote GDB support has been changed to use inheritance. Alpha should work, ↵Gabe Black
but isn't tested. Other architectures will not. --HG-- extra : convert_revision : fc7e1e73e2f3b1a4ab9905a1eb98c5f07c6c8707
2006-11-06Took the Alpha prefix off of AlphaArguments, and made sure it was being used ↵Gabe Black
from TheISA:: rather than AlphaISA:: --HG-- extra : convert_revision : 17c143d3cbc2f58a7a9d01366a8f649810ff7f33
2006-11-06Created seperate SConscript for the dev directory. Made subdirectories for ↵Gabe Black
Alpha and SPARC and put SConscripts in them. --HG-- rename : src/base/kgdb.h => src/arch/alpha/kgdb.h rename : src/dev/alpha_access.h => src/dev/alpha/access.h rename : src/dev/alpha_console.cc => src/dev/alpha/console.cc rename : src/dev/alpha_console.hh => src/dev/alpha/console.hh extra : convert_revision : a7dd466308cb83edc40528689aacb72413089cdf
2006-11-03Got rid of "inPalMode". Some places are still effectively checking if they ↵Gabe Black
are in PAL mode, however. --HG-- extra : convert_revision : b52d9642efc474eaf97437fa2df879efefa0062b
2006-11-03Add a new file which describes an ISA's interrupt handling mechanism. It ↵Gabe Black
records when interrupts are requested, and returns an interrupt to execute if the --HG-- extra : convert_revision : c535000a6a170caefd441687b60f940513d29739
2006-11-02Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : a9a41e2c292bd95aa148e1cf4d9a77c0622a462b
2006-11-02Use ISA specific makeExtMI.Kevin Lim
src/arch/alpha/utility.hh: For now makeExtMI will be specific to the ISA. --HG-- extra : convert_revision : 89959c6499efcc3df9301ad8ea039580764a1496
2006-11-01Fix a range check on the ipr_index.Gabe Black
--HG-- extra : convert_revision : 84e25abd4bb2de0c877c883804d39feb019c7030
2006-11-01Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ↵Gabe Black
file functions to not take faults --HG-- extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
2006-10-31Arg!Gabe Black
--HG-- extra : convert_revision : 8328d002780c0291e7eb264076a62084de88b7a5
2006-10-31More typos! I need to get nfs to work.Gabe Black
--HG-- extra : convert_revision : f5693e96d376254f777fb0cce7b5be3d36efbea9
2006-10-31Fix another typoGabe Black
--HG-- extra : convert_revision : ad7058babf2a13bfe543e05f2662dc49a18a8b8b
2006-10-31Check for out of range IPR values as well.Gabe Black
--HG-- extra : convert_revision : 9ca241bb71d8a1d022e54485383a88d2abece663
2006-10-31Fix stupid typoGabe Black
--HG-- extra : convert_revision : fbfc82974e89b2c726b689674c9f5d957682b280
2006-10-31Make two simple utility functions to determine if a MiscReg index ↵Gabe Black
corresponding to an IPR is readable or writable. --HG-- extra : convert_revision : 89eebba5eec01e629213997d24c734a6acad0ecb
2006-10-31We don't include ipr.cc in SE builds, so don't call it.Gabe Black
--HG-- extra : convert_revision : 45e52d7afbf74e0ddde11f58aeb084186389fc06
2006-10-31Made the old name refer to the miscreg index to prevent having to change ↵Gabe Black
code all over the place. --HG-- extra : convert_revision : e890a3ce420336acdb220396dcbf66d4b9974c76
2006-10-31Forgot to change the index.Gabe Black
--HG-- extra : convert_revision : 5a444e635d20bcca445a10e43592b6c10d25e879
2006-10-31Make the IPRs use regular miscreg indexes, and make a table or two to find ↵Gabe Black
the miscreg index of a specific IPR. --HG-- extra : convert_revision : dd235261e7086d6667b1b2bdc4a81b2573e21d53
2006-10-31Move IntrFlag into the MiscRegFile and get rid of specialized accessor ↵Gabe Black
functions. --HG-- extra : convert_revision : e0d12a150b01d05de9bc02bcbc7c22797975a5b9
2006-10-31Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes ↵Gabe Black
more neutral names. --HG-- extra : convert_revision : 702c715b7516a16602172deb1b78d6a7ab848fd4
2006-10-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : cb15101d24ef2969e1819d6bdeeb2dd1f23f02d1
2006-10-21Tweak a few things for better page fault debugging.Steve Reinhardt
src/sim/faults.cc: Fix fault message. src/kern/tru64/tru64.hh: Add DPRINTF to see where new thread stacks are allocated. src/arch/alpha/faults.cc: Add print statement so we know what the faulting address is in SE mode. --HG-- extra : convert_revision : 6eb2b513c339496a0d013b7e914953a0a066c12d
2006-10-20Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 2711fec2bf72801999b060e65f0bf744c18734fb
2006-10-20Use PacketPtr everywhereNathan Binkert
--HG-- extra : convert_revision : d9eb83ab77ffd2d725961f295b1733137e187711
2006-10-19refactor code for the packet, get rid of packet_impl.hhNathan Binkert
and call it packet_access.hh and fix the #includes so things compile right. --HG-- extra : convert_revision : d3626c9715b9f7e51bb3ab8d97e971fad4e0b724
2006-10-16Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 898976bbd322e55bc234035456df8090c6dcf72d
2006-10-13fix a bug in CopyStringOut. dprintk appears to work again.Ali Saidi
--HG-- extra : convert_revision : cd0d13a85ddc7599308db8604a8f63a48679cc05
2006-10-12Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 30b2475ba034550376455e1bc0e52e19a200fd5a
2006-10-08Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)Steve Reinhardt
and PhysicalMemory. *No* support for caches or O3CPU. Note that properly setting cpu_id on all CPUs is now required for correct operation. src/arch/SConscript: src/base/traceflags.py: src/cpu/base.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: src/mem/physical.cc: src/mem/physical.hh: src/mem/request.hh: src/python/m5/objects/BaseCPU.py: tests/configs/simple-atomic.py: tests/configs/simple-timing.py: tests/configs/tsunami-simple-atomic-dual.py: tests/configs/tsunami-simple-atomic.py: tests/configs/tsunami-simple-timing-dual.py: tests/configs/tsunami-simple-timing.py: Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) and PhysicalMemory. *No* support for caches or O3CPU. --HG-- extra : convert_revision : 6ce982d44924cc477e049b9adf359818908e72be
2006-10-06there are two main thrusts of this changeset.Lisa Hsu
1) return the periodicity of checkpoints back into the code (i.e. make m5 checkpoint n m meaningful again). 2) to do this, i had to much around with being able to repeatedly schedule and SimLoopExitEvent, which led to changes in how exit simloop events are handled to make this easier. src/arch/alpha/isa/decoder.isa: src/mem/cache/cache_impl.hh: modify arg. order for new calling convention of exitSimLoop. src/cpu/base.cc: src/sim/main.cc: src/sim/pseudo_inst.cc: src/sim/root.cc: now, instead of creating a new SimLoopExitEvent, call a wrapper schedExitSimLoop which handles all the default args. src/sim/sim_events.cc: src/sim/sim_events.hh: src/sim/sim_exit.hh: add the periodicity of checkpointing back into the code. to facilitate this, there are now two wrappers (instead of just overloading exitSimLoop). exitSimLoop is only for exiting NOW (i.e. at curTick), while schedExitSimLoop schedules and exit event for the future. --HG-- extra : convert_revision : c61f4bf05517172edd2c83368fd10bb0f0678029
2006-10-02Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem src/cpu/ozone/cpu_impl.hh: Hand merged --HG-- extra : convert_revision : f8a5b0205bcb78c8f5e109f456fe7bca80a7abac
2006-10-02Updates to fix merge issues and bring almost everything up to working speed. ↵Kevin Lim
Ozone CPU remains untested, but everything else compiles and runs. src/arch/alpha/isa_traits.hh: This got changed to the wrong version by accident. src/cpu/base.cc: Fix up progress event to not schedule itself if the interval is set to 0. src/cpu/base.hh: Fix up the CPU Progress Event to not print itself if it's set to 0. Also remove stats_reset_inst (something I added to m5 but isn't necessary here). src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.hh: Remove float variable of instResult; it's always held within the double part now. src/cpu/checker/cpu_impl.hh: Use thread and not cpuXC. src/cpu/o3/alpha/cpu_builder.cc: src/cpu/o3/checker_builder.cc: src/cpu/ozone/checker_builder.cc: src/cpu/ozone/cpu_builder.cc: src/python/m5/objects/BaseCPU.py: Remove stats_reset_inst. src/cpu/o3/commit_impl.hh: src/cpu/ozone/lw_back_end_impl.hh: Get TC, not XCProxy. src/cpu/o3/cpu.cc: Switch out updates from the version of m5 I have. Also remove serialize code that got added twice. src/cpu/o3/iew_impl.hh: src/cpu/o3/lsq_impl.hh: src/cpu/thread_state.hh: Remove code that was added twice. src/cpu/o3/lsq_unit.hh: Add back in stats that got lost in the merge. src/cpu/o3/lsq_unit_impl.hh: Use proper method to get flags. Also wake CPU if we're coming back from a cache miss. src/cpu/o3/thread_context_impl.hh: src/cpu/o3/thread_state.hh: Support profiling. src/cpu/ozone/cpu.hh: Update to use proper typename. src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/dyn_inst_impl.hh: Updates for newmem. src/cpu/ozone/lw_lsq_impl.hh: Get flags correctly. src/cpu/ozone/thread_state.hh: Reorder constructor initialization, use tc. src/sim/pseudo_inst.cc: Allow for loading of symbol file. Be sure to use ThreadContext and not ExecContext. --HG-- extra : convert_revision : c5657f84155807475ab4a1e20d944bb6f0d79d94
2006-09-30Merge ktlim@zamp:./local/clean/o3-merge/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem configs/boot/micro_memlat.rcS: configs/boot/micro_tlblat.rcS: src/arch/alpha/ev5.cc: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa_traits.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.hh: src/cpu/checker/cpu_impl.hh: src/cpu/o3/alpha/cpu_impl.hh: src/cpu/o3/alpha/params.hh: src/cpu/o3/checker_builder.cc: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/decode_impl.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/iew.hh: src/cpu/o3/iew_impl.hh: src/cpu/o3/inst_queue.hh: src/cpu/o3/lsq.hh: src/cpu/o3/lsq_impl.hh: src/cpu/o3/lsq_unit.hh: src/cpu/o3/lsq_unit_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/rename_impl.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/checker_builder.cc: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/simple/base.cc: src/cpu/simple_thread.cc: src/cpu/simple_thread.hh: src/cpu/thread_state.hh: src/dev/ide_disk.cc: src/python/m5/objects/O3CPU.py: src/python/m5/objects/Root.py: src/python/m5/objects/System.py: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/system.hh: util/m5/m5.c: Hand merge. --HG-- rename : arch/alpha/ev5.cc => src/arch/alpha/ev5.cc rename : arch/alpha/freebsd/system.cc => src/arch/alpha/freebsd/system.cc rename : arch/alpha/isa/decoder.isa => src/arch/alpha/isa/decoder.isa rename : arch/alpha/isa/mem.isa => src/arch/alpha/isa/mem.isa rename : arch/alpha/isa_traits.hh => src/arch/alpha/isa_traits.hh rename : arch/alpha/linux/system.cc => src/arch/alpha/linux/system.cc rename : arch/alpha/system.cc => src/arch/alpha/system.cc rename : arch/alpha/tru64/system.cc => src/arch/alpha/tru64/system.cc rename : cpu/base.cc => src/cpu/base.cc rename : cpu/base.hh => src/cpu/base.hh rename : cpu/base_dyn_inst.hh => src/cpu/base_dyn_inst.hh rename : cpu/checker/cpu.hh => src/cpu/checker/cpu.hh rename : cpu/checker/cpu.cc => src/cpu/checker/cpu_impl.hh rename : cpu/o3/alpha_cpu_builder.cc => src/cpu/o3/alpha/cpu_builder.cc rename : cpu/checker/o3_cpu_builder.cc => src/cpu/o3/checker_builder.cc rename : cpu/o3/commit_impl.hh => src/cpu/o3/commit_impl.hh rename : cpu/o3/cpu.cc => src/cpu/o3/cpu.cc rename : cpu/o3/fetch_impl.hh => src/cpu/o3/fetch_impl.hh rename : cpu/o3/iew.hh => src/cpu/o3/iew.hh rename : cpu/o3/iew_impl.hh => src/cpu/o3/iew_impl.hh rename : cpu/o3/inst_queue.hh => src/cpu/o3/inst_queue.hh rename : cpu/o3/inst_queue_impl.hh => src/cpu/o3/inst_queue_impl.hh rename : cpu/o3/lsq_impl.hh => src/cpu/o3/lsq_impl.hh rename : cpu/o3/lsq_unit.hh => src/cpu/o3/lsq_unit.hh rename : cpu/o3/lsq_unit_impl.hh => src/cpu/o3/lsq_unit_impl.hh rename : cpu/o3/mem_dep_unit_impl.hh => src/cpu/o3/mem_dep_unit_impl.hh rename : cpu/o3/rename.hh => src/cpu/o3/rename.hh rename : cpu/o3/rename_impl.hh => src/cpu/o3/rename_impl.hh rename : cpu/o3/thread_state.hh => src/cpu/o3/thread_state.hh rename : cpu/o3/tournament_pred.cc => src/cpu/o3/tournament_pred.cc rename : cpu/o3/tournament_pred.hh => src/cpu/o3/tournament_pred.hh rename : cpu/checker/cpu_builder.cc => src/cpu/ozone/checker_builder.cc rename : cpu/ozone/cpu.hh => src/cpu/ozone/cpu.hh rename : cpu/ozone/cpu_builder.cc => src/cpu/ozone/cpu_builder.cc rename : cpu/ozone/cpu_impl.hh => src/cpu/ozone/cpu_impl.hh rename : cpu/ozone/front_end.hh => src/cpu/ozone/front_end.hh rename : cpu/ozone/front_end_impl.hh => src/cpu/ozone/front_end_impl.hh rename : cpu/ozone/inorder_back_end_impl.hh => src/cpu/ozone/inorder_back_end_impl.hh rename : cpu/ozone/inst_queue_impl.hh => src/cpu/ozone/inst_queue_impl.hh rename : cpu/ozone/lw_back_end.hh => src/cpu/ozone/lw_back_end.hh rename : cpu/ozone/lw_back_end_impl.hh => src/cpu/ozone/lw_back_end_impl.hh rename : cpu/ozone/lw_lsq.hh => src/cpu/ozone/lw_lsq.hh rename : cpu/ozone/lw_lsq_impl.hh => src/cpu/ozone/lw_lsq_impl.hh rename : cpu/ozone/simple_params.hh => src/cpu/ozone/simple_params.hh rename : cpu/ozone/thread_state.hh => src/cpu/ozone/thread_state.hh rename : cpu/simple/cpu.cc => src/cpu/simple/base.cc rename : cpu/cpu_exec_context.cc => src/cpu/simple_thread.cc rename : cpu/thread_state.hh => src/cpu/thread_state.hh rename : dev/ide_disk.hh => src/dev/ide_disk.hh rename : python/m5/objects/BaseCPU.py => src/python/m5/objects/BaseCPU.py rename : python/m5/objects/AlphaFullCPU.py => src/python/m5/objects/O3CPU.py rename : python/m5/objects/OzoneCPU.py => src/python/m5/objects/OzoneCPU.py rename : python/m5/objects/Root.py => src/python/m5/objects/Root.py rename : python/m5/objects/System.py => src/python/m5/objects/System.py rename : sim/eventq.hh => src/sim/eventq.hh rename : sim/pseudo_inst.cc => src/sim/pseudo_inst.cc rename : sim/pseudo_inst.hh => src/sim/pseudo_inst.hh rename : sim/serialize.cc => src/sim/serialize.cc rename : sim/stat_control.cc => src/sim/stat_control.cc rename : sim/stat_control.hh => src/sim/stat_control.hh rename : sim/system.hh => src/sim/system.hh extra : convert_revision : 135d90e43f6cea89f9460ba4e23f4b0b85886e7d
2006-09-30Changed makeExtMI to take a ThreadContext instead of a pc.Gabe Black
--HG-- extra : convert_revision : e5b200e4e053702fc703f44149d18ce48ac4eaa6
2006-09-17Finished changing how stat structures are translated, fixed the handling of ↵Gabe Black
various ids as LiveProcess parameters. src/arch/alpha/linux/process.cc: src/arch/alpha/linux/process.hh: src/arch/alpha/process.cc: src/arch/alpha/process.hh: src/arch/alpha/tru64/process.cc: src/arch/alpha/tru64/process.hh: src/arch/mips/linux/process.cc: src/arch/mips/linux/process.hh: src/arch/mips/process.cc: src/arch/mips/process.hh: src/arch/sparc/linux/process.cc: src/arch/sparc/linux/process.hh: src/arch/sparc/process.cc: src/arch/sparc/process.hh: src/arch/sparc/solaris/process.cc: src/arch/sparc/solaris/process.hh: src/sim/process.cc: src/sim/process.hh: src/sim/syscall_emul.cc: src/sim/syscall_emul.hh: Changed Process to LiveProcess in syscall handlers and fixed the implementation of uid, euid, gid, egid, pid and ppid as LiveProcess parameters. src/kern/tru64/tru64.hh: Changed Process to LiveProcess in syscall handlers and fixed the implementation of uid, euid, gid, egid, pid and ppid as LiveProcess parameters. Also fit tru64 in with the new way to handle stat calls. --HG-- extra : convert_revision : 0198b838e5c09a730065dc6f018738145bc96269
2006-09-11Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : 14ac24236ff65b7e489c1ce4b4e9a295966013b8
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-20 08:37:50 +0000