Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-07-09 | Alpha: Missed a file in an earlier changeset. | Gabe Black | |
2009-07-08 | Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. | Gabe Black | |
2009-07-08 | Alpha: Pull the MiscRegFile fully into the ISA object. | Gabe Black | |
2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black | |
This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh | |||
2009-07-08 | Alpha: Move reg_redir into its own files, and move some constants into ↵ | Gabe Black | |
regfile.hh. | |||
2009-07-08 | Registers: Eliminate the ISA defined RegFile class. | Gabe Black | |
2009-07-08 | Alpha: Get rid of function prototypes with no implementations. | Gabe Black | |
2009-07-08 | Registers: Move the PCs out of the ISAs and into the CPUs. | Gabe Black | |
2009-07-08 | Alpha: Phase out Alpha's intregfile.hh and intregfile.cc. | Gabe Black | |
2009-07-08 | Registers: Eliminate the ISA defined integer register file. | Gabe Black | |
2009-07-08 | Registers: Eliminate the ISA defined floating point register file. | Gabe Black | |
2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black | |
2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black | |
This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. | |||
2009-06-04 | types: clean up types, especially signed vs unsigned | Nathan Binkert | |
2009-05-26 | types: add a type for thread IDs and try to use it everywhere | Nathan Binkert | |
2009-05-17 | includes: sort includes again | Nathan Binkert | |
2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert | |
--HG-- rename : src/sim/host.hh => src/base/types.hh | |||
2009-05-12 | alpha-isa: add mt.hh so it can compile with inorder | Korey Sewell | |
2009-05-12 | inorder-tlb-cunit: merge the TLB as implicit to any memory access | Korey Sewell | |
TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory and the result is checked before it's sent out to memory. * * * | |||
2009-05-12 | inorder-float: Fix storage of FP results | Korey Sewell | |
inorder was incorrectly storing FP values and confusing the integer/fp storage view of floating point operations. A big issue was knowing trying to infer when were doing single or double precision access because this lets you know the size of value to store (32-64 bits). This isnt exactly straightforward since alpha uses all 64-bit regs while mips/sparc uses a dual-reg view. by getting this value from the actual floating point register file, the model can figure out what it needs to store | |||
2009-05-12 | inorder-mem: skeleton support for prefetch/writehints | Korey Sewell | |
2009-05-12 | inorder-unified-tlb: use unified TLB instead of old TLB model | Korey Sewell | |
2009-05-12 | inorder/alpha-isa: create eaComp object visible to StaticInst through ISA | Korey Sewell | |
Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead, create eaComp that is visible from StaticInst object. Gives InOrder model capability of generating address without actually initiating access * * * | |||
2009-05-12 | inorder-bpred: edits to handle non-delay-slot ISAs | Korey Sewell | |
Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline | |||
2009-05-12 | inorder-alpha-port: initial inorder support of ALPHA | Korey Sewell | |
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.) | |||
2009-04-21 | syscall: Resolve conflicts between m5threads and Gabe's recent SE changes. | Steve Reinhardt | |
2009-04-21 | Commit m5threads package. | Daniel Sanchez | |
This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC. | |||
2009-04-19 | Memory: Rename LOCKED for load locked store conditional to LLSC. | Gabe Black | |
2009-04-08 | alpha: get rid of all turbolaser remnants | Nathan Binkert | |
2009-04-08 | tlb: More fixing of unified TLB | Nathan Binkert | |
2009-04-08 | tlb: Don't separate the TLB classes into an instruction TLB and a data TLB | Gabe Black | |
2009-03-05 | stats: Fix all stats usages to deal with template fixes | Nathan Binkert | |
2009-03-05 | Get rid of 'using namespace' declarations in headers. | Steve Reinhardt | |
2009-02-28 | Fix Num_Syscall_Descs check bug in non-x86 ISAs. | Steve Reinhardt | |
(See cset d35d2b28df38 for x86 fix.) | |||
2009-02-27 | Processes: Make getting and setting system call arguments part of a process ↵ | Gabe Black | |
object. | |||
2009-02-26 | CPA: Add code to automatically record function symbols as CPU executes. | Ali Saidi | |
2009-02-26 | CPA: Add new object for gathering critical path annotations. | Ali Saidi | |
2009-02-25 | ISA: Get rid of the get*RegName functions. | Gabe Black | |
2009-02-25 | CPU: Implement translateTiming which defers to translateAtomic, and convert ↵ | Gabe Black | |
the timing simple CPU to use it. | |||
2009-02-25 | ISA: Replace the translate functions in the TLBs with translateAtomic. | Gabe Black | |
2009-02-23 | debug: Move debug_break into src/base | Nathan Binkert | |
2009-02-16 | sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has ↵ | Lisa Hsu | |
been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. | |||
2009-02-09 | scons: Require SCons version 0.98.1 | Nathan Binkert | |
This allows me to clean things up so we are up to date with respect to deprecated features. There are many features scheduled for permanent failure in scons 2.0 and 0.98.1 provides the most compatability for that. It also paves the way for some nice new features that I will add soon | |||
2009-01-25 | CPU: Add a setCPU function to the interrupt objects. | Gabe Black | |
2009-01-24 | pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu. | Nathan Binkert | |
It's instantaneous and so it's somewhat bogus, but it's a first step. | |||
2008-12-17 | Make Alpha pseudo-insts available from SE mode. | Steve Reinhardt | |
2008-12-07 | imported patch aux-fix.patch | Lisa Hsu | |
2008-12-06 | flags: Change naming of functions to be clearer | Nathan Binkert | |
2008-12-05 | This brings M5 closer to modernity - the kernel being advertised is newer so ↵ | Lisa Hsu | |
it won't die on binaries compiled with newer glibc's, and enables use of TLS-toolchain built binaries for ALPHA_SE by putting auxiliary vectors on the stack. There are some comments in the code to help. Finally, stats changes for ALPHA are from slight perturbations to the initial stack frame, all minimal diffs. | |||
2008-11-15 | syscalls: fix latent brk/obreak bug. | Steve Reinhardt | |
Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process. |