| Age | Commit message (Expand) | Author |
|---|
| 2020-01-22 | arch: Get rid of the unused (and mostly undefined) zeroRegisters. | Gabe Black |
| 2019-12-10 | sim,arch: Collapse the ISA specific versions of m5Syscall. | Gabe Black |
| 2019-12-10 | arch,cpu,sim: Push syscall number determination up to processes. | Gabe Black |
| 2019-12-10 | arch: Get rid of the now unused setSyscallArg. | Gabe Black |
| 2019-12-10 | arch: Stop using setSyscallArg to set argc and argv. | Gabe Black |
| 2019-11-18 | arch: Get rid of the (Big|Little)EndianGuest namespaces. | Gabe Black |
| 2019-11-18 | arch: Make and use endian specific versions of the mem helpers. | Gabe Black |
| 2019-11-02 | arch,cpu: Move endianness conversion of inst bytes into the ISA. | Gabe Black |
| 2019-10-31 | alpha: Convert htog and gtoh to htole and letoh. | Gabe Black |
| 2019-10-30 | arch,sim: Make copyStringArray take an explicit endianness. | Gabe Black |
| 2019-10-30 | arch: Make endianness a property of the OS class syscalls can consume. | Gabe Black |
| 2019-10-25 | sim: Make the System object a PCEventScope. | Gabe Black |
| 2019-10-25 | cpu: Create a PCEventScope class to abstract the scope of PCEvents. | Gabe Black |
| 2019-10-19 | arch: Make a base class for Interrupts. | Gabe Black |
| 2019-10-16 | arch,base,sim: Move Process loader hooks into the Process class. | Gabe Black |
| 2019-10-12 | arch,base: Separate the idea of a memory image and object file. | Gabe Black |
| 2019-10-10 | arch,base: Stop loading the interpreter in ElfObject. | Gabe Black |
| 2019-10-10 | arch, base: Stop assuming object files have three segments. | Gabe Black |
| 2019-10-09 | base: Rename Section to Segment, and some of its members. | Gabe Black |
| 2019-10-08 | base: Get rid of the unused global pointer in object files. | Gabe Black |
| 2019-05-30 | arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy. | Gabe Black |
| 2019-05-30 | arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s. | Gabe Black |
| 2019-05-30 | arch, base, sim: Replace Copy(String)?(In|Out) with equivalent code. | Gabe Black |
| 2019-05-29 | sim-se: add a release parameter to Process.py | Ciro Santilli |
| 2019-05-29 | arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods. | Gabe Black |
| 2019-05-21 | sim-se: change syscall function signature | Brandon Potter |
| 2019-05-18 | alpha: Add an object file loader for linux. | Gabe Black |
| 2019-05-18 | arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code. | Gabe Black |
| 2019-04-30 | arch: Stop using TheISA within the ISAs. | Gabe Black |
| 2019-04-30 | arch: Remove the mt.hh switching header. | Gabe Black |
| 2019-04-30 | cpu: alpha: Delete all occurrances of the simPalCheck function. | Gabe Black |
| 2019-04-30 | alpha: Implement simPalCheck within the ISA description. | Gabe Black |
| 2019-04-30 | cpu: Remove hwrei from the generic interfaces. | Gabe Black |
| 2019-04-30 | arch: cpu: Track kernel stats using the base ISA agnostic type. | Gabe Black |
| 2019-04-30 | alpha: Implement HWREI in the ISA. | Gabe Black |
| 2019-04-30 | alpha: Add some control registers to the ISA operands list. | Gabe Black |
| 2019-04-28 | arch, sim: Simplify the AuxVector type. | Gabe Black |
| 2019-04-28 | mem: Remove the ISA specialized versions of port proxy's read/write. | Gabe Black |
| 2019-04-22 | cpu: Eliminate the ProxyThreadContext class. | Gabe Black |
| 2019-02-12 | python: Don't assume SimObjects live in the global namespace | Andreas Sandberg |
| 2019-02-01 | cpu, arch: Replace the CCReg type with RegVal. | Gabe Black |
| 2019-01-31 | alpha: Stop using architecture specific register types. | Gabe Black |
| 2019-01-31 | arch: cpu: Rename *FloatRegBits* to *FloatReg*. | Gabe Black |
| 2019-01-30 | arch,cpu: Add vector predicate registers | Giacomo Gabrielli |
| 2019-01-24 | base: arch: Get rid of the now unused FloatRegVal type. | Gabe Black |
| 2019-01-22 | arch: cpu: Stop passing around misc registers by reference. | Gabe Black |
| 2019-01-22 | sim-se: add syscalls related to polling | Brandon Potter |
| 2019-01-16 | arch: Make the ISA register types aliases for the global types. | Gabe Black |
| 2019-01-10 | sim-se: Refactor clone to avoid most ifdefs | Andreas Sandberg |
| 2018-12-20 | arch, cpu: Remove float type accessors. | Gabe Black |
