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path: root/src/arch/alpha
AgeCommit message (Expand)Author
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-23debug: Move debug_break into src/baseNathan Binkert
2009-02-16sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has bee...Lisa Hsu
2009-02-09scons: Require SCons version 0.98.1Nathan Binkert
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2009-01-24pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.Nathan Binkert
2008-12-17Make Alpha pseudo-insts available from SE mode.Steve Reinhardt
2008-12-07imported patch aux-fix.patchLisa Hsu
2008-12-06flags: Change naming of functions to be clearerNathan Binkert
2008-12-05This brings M5 closer to modernity - the kernel being advertised is newer so ...Lisa Hsu
2008-11-15syscalls: fix latent brk/obreak bug.Steve Reinhardt
2008-11-14Fix a bunch of bugs I introduced when I changed the flags stuff for packets.Nathan Binkert
2008-11-10pseudo inst: Add rpns (read processor nanoseconds) instruction.Nathan Binkert
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02Make it so that all thread contexts are registered with the System, even inLisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-12CPU: Create a microcode ROM object in the CPU which is defined by the ISA.Gabe Black
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2008-10-12CPU: Eliminate the get_vec function.Gabe Black
2008-10-11CPU: Eliminate the simPalCheck funciton.Gabe Black
2008-10-11CPU: Eliminate the hwrei function.Gabe Black
2008-10-10TLB: Make all tlbs derive from a common base class in both python and C++.Gabe Black
2008-10-10misc: remove #include <cassert> from misc.hh since not everyone needs it.Nathan Binkert
2008-10-09SimObjects: Clean up handling of C++ namespaces.Nathan Binkert
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-09-29alpha: Need to include cstring so that g++ 4.3 works.Nathan Binkert
2008-09-27gcc: Add extra parens to quell warnings.Nathan Binkert
2008-09-27style: Make a style pass over the whole arch/alpha directory.Nathan Binkert
2008-09-27alpha: Clean up namespace usage.Nathan Binkert
2008-09-27arch: TheISA shouldn't really ever be used in the arch directory.Nathan Binkert
2008-09-27alpha: Get rid fo the namespace called EV5.Nathan Binkert
2008-09-27styleNathan Binkert
2008-09-22styleNathan Binkert
2008-09-19We're using the static keyword improperly in some cases.Nathan Binkert
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-08-13Return an UnimpFault for an ITB translation of an uncachable address. We don'...Ali Saidi
2008-07-23syscalls: Add a bunch of missing system calls.Michael Adler
2008-07-11m5ops: clean up the m5ops stuff.Nathan Binkert
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-07-01Change everything to use the cached virtPort rather than created their own ea...Ali Saidi
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2007-11-15Add CoreSpecific type to all archsKorey Sewell
2007-11-15Get MIPS simple regression working. Take out unecessary functions "setShadowS...Korey Sewell
2007-11-15branch mergeKorey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
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