gem5 - gem5

Age	Commit message (Expand)	Author
2010-06-02	ARM: Clean up the implementation of the VFP instructions.	Gabe Black
2010-06-02	ARM: Implement a function to decode CP15 registers to MiscReg indices.	Gabe Black
2010-06-02	ARM: Define versions of MSR and MRS outside the decoder.	Gabe Black
2010-06-02	ARM: Move the macro mem constructor out of the isa desc.	Gabe Black
2010-06-02	ARM: Make the predecoder handle Thumb instructions.	Gabe Black
2009-11-17	ARM: Boilerplate full-system code.	Ali Saidi
2009-11-10	ARM: Implement fault classes.	Gabe Black
2009-07-27	ARM: Add a native tracer.	Gabe Black
2009-07-09	ARM: Fold the MiscRegFile all the way into the ISA object.	Gabe Black
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
2009-07-08	Registers: Collapse ARM and MIPS regfile directories.	Gabe Black
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
2009-06-21	ARM: Simplify the ISA desc by pulling some classes out of it.	Gabe Black
2009-06-21	ARM: Clear out some inherited hangers on in util.isa and utility.hh.	Gabe Black
2009-04-05	arm: add ARM support to M5	Stephen Hines