gem5 - gem5

Age	Commit message (Collapse)	Author
2013-01-07	arch: Make the ISA class inherit from SimObject	Andreas Sandberg
	The ISA class on stores the contents of ID registers on many architectures. In order to make reset values of such registers configurable, we make the class inherit from SimObject, which allows us to use the normal generated parameter headers. This patch introduces a Python helper method, BaseCPU.createThreads(), which creates a set of ISAs for each of the threads in an SMT system. Although it is currently only needed when creating multi-threaded CPUs, it should always be called before instantiating the system as this is an obvious place to configure ID registers identifying a thread/CPU.
2012-06-05	ISA: Back-out NoopMachInst as a StaticInstPtr change.	Ali Saidi

2012-06-05	ARM: Fix compilation on ARM after Gabe's change.	Ali Saidi

2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
	These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
2012-05-25	ISA: Make the decode function part of the ISA's decoder.	Gabe Black

2011-11-02	SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.	Gabe Black

2011-10-31	SE/FS: Make the functions available from the TC consistent between SE and FS.	Gabe Black

2011-10-16	ARM: Build vtophys in SE mode.	Gabe Black

2011-10-16	ARM: Turn on the page table walker on ARM in SE mode.	Gabe Black

2011-10-09	SE/FS: Build the Interrupt objects in SE mode.	Gabe Black

2011-06-02	scons: rename TraceFlags to DebugFlags	Nathan Binkert

2010-11-15	ARM: Add support for GDB on ARM	William Wang
	--HG-- rename : src/arch/alpha/remote_gdb.cc => src/arch/arm/remote_gdb.cc
2010-10-01	ARM: Implement functional virtual to physical address translation	Ali Saidi
	for debugging and program introspection.
2010-08-23	ARM: Add system for ARM/Linux and bootstrapping	Ali Saidi

2010-06-02	ARM: Get rid of the empty branch.cc.	Gabe Black

2010-06-02	ARM: Move some predecoder stuff into a .cc file.	Gabe Black
	--HG-- rename : src/arch/arm/predecoder.hh => src/arch/arm/predecoder.cc
2010-06-02	ARM: Move Miscreg functions out of isa.hh	Ali Saidi

2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi

2010-06-02	ARM: Start over with translation from Alpha code as opposed to something ↵	Ali Saidi
	that has cruft from 4 different ISAs.
2010-06-02	ARM: Clean up the implementation of the VFP instructions.	Gabe Black

2010-06-02	ARM: Implement a function to decode CP15 registers to MiscReg indices.	Gabe Black

2010-06-02	ARM: Define versions of MSR and MRS outside the decoder.	Gabe Black

2010-06-02	ARM: Move the macro mem constructor out of the isa desc.	Gabe Black
	This code doesn't use the parser at all, and moving it out reduces the conceptual complexity of that code.
2010-06-02	ARM: Make the predecoder handle Thumb instructions.	Gabe Black

2009-11-17	ARM: Boilerplate full-system code.	Ali Saidi
	--HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
2009-11-10	ARM: Implement fault classes.	Gabe Black
	Implement some fault classes using the curriously recurring template pattern, similar to SPARCs.
2009-07-27	ARM: Add a native tracer.	Gabe Black
	--HG-- rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
2009-07-09	ARM: Fold the MiscRegFile all the way into the ISA object.	Gabe Black

2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08	Registers: Collapse ARM and MIPS regfile directories.	Gabe Black
	--HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
	This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-06-21	ARM: Simplify the ISA desc by pulling some classes out of it.	Gabe Black

2009-06-21	ARM: Clear out some inherited hangers on in util.isa and utility.hh.	Gabe Black

2009-04-05	arm: add ARM support to M5	Stephen Hines