gem5 - gem5

Age	Commit message (Collapse)	Author
2010-06-02	ARM: Move Miscreg functions out of isa.hh	Ali Saidi

2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi

2010-06-02	ARM: Start over with translation from Alpha code as opposed to something ↵	Ali Saidi
	that has cruft from 4 different ISAs.
2010-06-02	ARM: Clean up the implementation of the VFP instructions.	Gabe Black

2010-06-02	ARM: Implement a function to decode CP15 registers to MiscReg indices.	Gabe Black

2010-06-02	ARM: Define versions of MSR and MRS outside the decoder.	Gabe Black

2010-06-02	ARM: Move the macro mem constructor out of the isa desc.	Gabe Black
	This code doesn't use the parser at all, and moving it out reduces the conceptual complexity of that code.
2010-06-02	ARM: Make the predecoder handle Thumb instructions.	Gabe Black

2009-11-17	ARM: Boilerplate full-system code.	Ali Saidi
	--HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
2009-11-10	ARM: Implement fault classes.	Gabe Black
	Implement some fault classes using the curriously recurring template pattern, similar to SPARCs.
2009-07-27	ARM: Add a native tracer.	Gabe Black
	--HG-- rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
2009-07-09	ARM: Fold the MiscRegFile all the way into the ISA object.	Gabe Black

2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08	Registers: Collapse ARM and MIPS regfile directories.	Gabe Black
	--HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
	This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-06-21	ARM: Simplify the ISA desc by pulling some classes out of it.	Gabe Black

2009-06-21	ARM: Clear out some inherited hangers on in util.isa and utility.hh.	Gabe Black

2009-04-05	arm: add ARM support to M5	Stephen Hines