gem5 - gem5

Age	Commit message (Collapse)	Author
2013-01-04	Decoder: Remove the thread context get/set from the decoder.	Gabe Black
	This interface is no longer used, and getting rid of it simplifies the decoders and code that sets up the decoders. The thread context had been used to read architectural state which was used to contextualize the instruction memory as it came in. That was changed so that the state is now sent to the decoders to keep locally if/when it changes. That's significantly more efficient. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2013-01-04	ARM: Keep a copy of the fpscr len and stride fields in the decoder.	Gabe Black
	Avoid reading them every instruction, and also eliminate the last use of the thread context in the decoders. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2012-05-26	ISA,CPU: Generalize and split out the components of the decode cache.	Gabe Black
	This will allow it to be specialized by the ISAs. The existing caching scheme is provided by the BasicDecodeCache in the GenericISA namespace and is built from the generalized components. --HG-- rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
	These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
2012-05-25	ISA: Make the decode function part of the ISA's decoder.	Gabe Black