| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
| 2013-01-22 | x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch | Nilay Vaish |
| 2013-01-04 | Decoder: Remove the thread context get/set from the decoder. | Gabe Black |
| 2013-01-04 | ARM: Keep a copy of the fpscr len and stride fields in the decoder. | Gabe Black |
| 2012-05-26 | ISA,CPU: Generalize and split out the components of the decode cache. | Gabe Black |
| 2012-05-26 | CPU: Merge the predecoder and decoder. | Gabe Black |
| 2012-05-25 | ISA: Make the decode function part of the ISA's decoder. | Gabe Black |
| 2012-05-25 | Decode: Make the Decoder class defined per ISA. | Gabe Black |
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index : gem5 | |
| gem5 |
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