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Use them in place of messing with termcap directly.
Change-Id: I093efa95e6b6ea7af198dc1395dce05ca6d6575f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23263
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
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This lets us avoid having to have two levels of bridging and twice as
many ports on both the CPU and GIC side. The direct communication ports
can be instantiated and connected using array syntax, where the bridges
require instantiating each bridge individually and wiring them up one
at a time with a lot of boilerplate/duplicate code.
Change-Id: I815ee47bcd19994e46a5220e0c23e89c497d7aa5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21050
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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Fast Models are models written by ARM which emulate different
components of a computer system. They can be combined into small
subsystems and then exported as systemc modules.
To enable this code, you'll need to set USE_ARM_FASTMODEL variable to
true. This CL does not include the fast models themselves, or a license
to use them or the associated tools. To build these fast models, you'll
need to set some scons variables. These variables should be set as
described in the fast model distribution.
* PVLIB_HOME
* MAXCORE_HOME
* ARMLMD_LICENSE_FILE
Some minor patches to source filesdistributed with the fast model code
may be necessary since their use of systemc is not necessarily 100%
standards compliant.
Change-Id: Id53814b95d8aa320da4d4f2159be0736fc12eb73
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20799
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
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