gem5 - gem5

Age	Commit message (Expand)	Author
2020-01-22	fastmodel: Implement CC reg accessors.	Gabe Black
2020-01-07	fastmodel: Implement the vecPredReg accessor functions.	Gabe Black
2019-12-30	fastmodel: Fix compilation errors	Chun-Chen TK Hsu
2019-12-27	fastmodel: Move ARM but not CortexA76 specific bits to the IRIS TC.	Gabe Black
2019-12-27	fastmodel: Move the ARM IRIS threadcontext into CortexA76.	Gabe Black
2019-12-27	fastmodel: Mostly collapse ARM base classes for the CortexA76 CPU.	Gabe Black
2019-12-27	fastmodel: Checkpoint the TCs when checkpointing a fast model CPU.	Gabe Black
2019-12-27	fastmodel: Handle "special" vector regs without calling into IRIS.	Gabe Black
2019-12-24	fastmodel: Implement readVecRegFlat for ArmThreadContext.	Gabe Black
2019-12-24	fastmodel: Determine what space to use for breakpoints dynamically.	Gabe Black
2019-12-23	fastmodel: Implement PC based events.	Gabe Black
2019-12-17	fastmodel: Tell fast model not to shutdown when time stops.	Gabe Black
2019-12-17	fastmodel: Implement port proxies.	Gabe Black
2019-12-17	fastmodel: Create a TLB model which uses IRIS to do translations.	Gabe Black
2019-12-17	fastmodel: Add an address translation mechanism to the ThreadContext.	Gabe Black
2019-12-17	fastmodel: Add a header for IRIS MSN constants.	Gabe Black
2019-12-10	arch,cpu,sim: Push syscall number determination up to processes.	Gabe Black
2019-12-03	fastmodel: Switch the diagnostic pragmas to GCC from clang.	Gabe Black
2019-12-03	systemc,fastmodel: Use the gem5_scons error and warning functions.	Gabe Black
2019-12-03	fastmodel: Suppress a spurious warning on clang for amba_pv.h.	Gabe Black
2019-11-14	arch-arm: Refactor code to check if gic is GicV2	Chun-Chen TK Hsu
2019-11-14	config: Add fastmodel cluster in fs_bigLITTLE.py	Chun-Chen TK Hsu
2019-11-13	fastmodel: Implement reading vector registers with readVecReg.	Gabe Black
2019-11-07	fastmodel: Plumb the ITB and DTB through the IRIS thread context.	Gabe Black
2019-11-06	fastmodel: Implement inst count events in the IRIS thread contexts.	Gabe Black
2019-10-31	fastmodel: Add CortexA76x[234] models.	Gabe Black
2019-10-31	fastmodel: Enable auto bridging and use it to simplify CortexA76x1.	Gabe Black
2019-10-31	fastmodel: Templatize the xn versions of the CortexA76.	Gabe Black
2019-10-30	fastmodel: Refactor the CortexA76x1 model for MP support.	Gabe Black
2019-10-30	fastmodel: Helper function to setup FastModels for simulation	Chun-Chen TK Hsu
2019-10-25	cpu: Get rid of the nextInstEventCount method.	Gabe Black
2019-10-25	cpu: Get rid of the serviceInstCountEvents method.	Gabe Black
2019-10-25	fastmodel: Use getCurrentInstCount for totalInsts().	Gabe Black
2019-10-25	fastmodel: Implement getCurrentInstCount.	Gabe Black
2019-10-25	cpu: Switch off of the CPU's comInstEventQueue.	Gabe Black
2019-10-25	cpu: Make the ThreadContext a PCEventScope.	Gabe Black
2019-10-23	fastmodel: Add string constructors which delegate to const char * ones.	Gabe Black
2019-10-14	fastmodel: Expose all CPU communication ports from the GIC.	Gabe Black
2019-10-09	fastmodel: Export GICV3Comms directly.	Gabe Black
2019-10-07	fastmodel: Make CortexA76x1's interrupts use gem5's mechanisms.	Gabe Black
2019-10-02	fastmodel: Get rid of the back channel mem port in FastModel::ArmCPU.	Gabe Black
2019-10-02	fastmodel: Implement a custom sendFunctional for CortexA76x1.	Gabe Black
2019-10-02	fastmodel: Let the EVS set an attribute for getSendFunctional to return.	Gabe Black
2019-10-01	fastmodel: Add a gem5Cpu attribute to the CortexA76x1.	Gabe Black
2019-10-01	fastmodel: Add a utility class which makes it easier to watch signals.	Gabe Black
2019-10-01	fastmodel: Pull out and simplify the interrupt mechanism in the GIC.	Gabe Black
2019-09-27	fastmodel: Add glue code which adapts fastmodels to run in gem5.	Gabe Black