| Age | Commit message (Expand) | Author |
|---|
| 2016-08-02 | arm: correctly assign faulting IPA's to HPFAR_EL2 | Dylan Johnson |
| 2016-08-02 | arm: Fix secure state checking in various places | Dylan Johnson |
| 2016-08-02 | arm: Add check to fault routing for hypervisor/virtualization | Dylan Johnson |
| 2016-08-02 | arm: Add AArch64 hypervisor call instruction 'hvc' | Dylan Johnson |
| 2016-08-02 | arm: enable EL2 support | Curtis Dunham |
| 2016-05-27 | arm: Use the target EL state when determining fault format | Andreas Sandberg |
| 2015-09-30 | isa,cpu: Add support for FS SMT Interrupts | Mitch Hayenga |
| 2014-09-27 | arch: Use const StaticInstPtr references where possible | Andreas Hansson |
| 2014-09-12 | style: Fix line continuation, especially in debug messages | Andrew Bardsley |
| 2014-04-29 | arm: use condition code registers for ARM ISA | Curtis Dunham |
| 2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
| 2013-02-19 | scons: Add warning for missing field initializers | Andreas Hansson |
| 2012-01-29 | Implement Ali's review feedback. | Gabe Black |
| 2011-11-02 | SE/FS: Get rid of FULL_SYSTEM in the ARM ISA. | Gabe Black |
| 2011-09-13 | LSQ: Only trigger a memory violation with a load/load if the value changes. | Ali Saidi |
| 2011-08-19 | Fix bugs due to interaction between SEV instructions and O3 pipeline | Geoffrey Blake |
| 2011-05-23 | O3: Fix issue with interrupts/faults occuring in the middle of a macro-op | Geoffrey Blake |
| 2011-05-13 | ARM: Further break up condition code into NZ, C, V bits. | Ali Saidi |
| 2011-05-13 | ARM: Remove the saturating (Q) condition code from the renamed register. | Ali Saidi |
| 2011-05-13 | ARM: Break up condition codes into normal flags, saturation, and simd. | Ali Saidi |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2011-04-15 | includes: sort all includes | Nathan Binkert |
| 2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
| 2011-04-04 | ARM: Fix table walk going on while ASID changes error | Ali Saidi |
| 2011-02-23 | ARM: Set ITSTATE correctly after FlushPipe | Ali Saidi |
| 2011-02-23 | ARM: Delete OABI syscall handling. | Ali Saidi |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-10-01 | ARM: Clean up use of TBit and JBit. | Ali Saidi |
| 2010-09-13 | Faults: Pass the StaticInst involved, if any, to a Fault's invoke method. | Gabe Black |
| 2010-08-25 | ARM: Adding a bogus fault that does nothing. | Min Kyu Jeong |
| 2010-08-25 | ARM: Implement CPACR register and return Undefined Instruction when FP access... | Gabe Black |
| 2010-08-23 | ARM: Add system for ARM/Linux and bootstrapping | Ali Saidi |
| 2010-06-02 | ARM: Get rid of the binary dumping function in utility.hh. | Gabe Black |
| 2010-06-02 | ARM: Make sure the upc is zeroed when vectoring to a fault. | Gabe Black |
| 2010-06-02 | ARM: Implement ARM CPU interrupts | Ali Saidi |
| 2010-06-02 | ARM: Implement and update the DFSR and IFSR registers on faults. | Gabe Black |
| 2010-06-02 | ARM: Set CPSR.E to SCTLR.EE on faults. | Gabe Black |
| 2010-06-02 | ARM: Zero the micropc when vectoring to a fault. | Gabe Black |
| 2010-06-02 | ARM: Trigger system calls from the SupervisorCall invoke method. | Gabe Black |
| 2010-06-02 | ARM: Rework how unrecognized/unimplemented instructions are handled. | Gabe Black |
| 2010-06-02 | ARM: Track the current ISA mode using the PC. | Gabe Black |
| 2009-11-10 | ARM: Implement fault classes. | Gabe Black |
| 2009-07-08 | Registers: Eliminate the ISA defined RegFile class. | Gabe Black |
| 2009-04-05 | arm: add ARM support to M5 | Stephen Hines |
