gem5 - gem5

Age	Commit message (Expand)	Author
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-10-01	ARM: Clean up use of TBit and JBit.	Ali Saidi
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
2010-08-25	ARM: Adding a bogus fault that does nothing.	Min Kyu Jeong
2010-08-25	ARM: Implement CPACR register and return Undefined Instruction when FP access...	Gabe Black
2010-08-23	ARM: Add system for ARM/Linux and bootstrapping	Ali Saidi
2010-06-02	ARM: Get rid of the binary dumping function in utility.hh.	Gabe Black
2010-06-02	ARM: Make sure the upc is zeroed when vectoring to a fault.	Gabe Black
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi
2010-06-02	ARM: Implement and update the DFSR and IFSR registers on faults.	Gabe Black
2010-06-02	ARM: Set CPSR.E to SCTLR.EE on faults.	Gabe Black
2010-06-02	ARM: Zero the micropc when vectoring to a fault.	Gabe Black
2010-06-02	ARM: Trigger system calls from the SupervisorCall invoke method.	Gabe Black
2010-06-02	ARM: Rework how unrecognized/unimplemented instructions are handled.	Gabe Black
2010-06-02	ARM: Track the current ISA mode using the PC.	Gabe Black
2009-11-10	ARM: Implement fault classes.	Gabe Black
2009-07-08	Registers: Eliminate the ISA defined RegFile class.	Gabe Black
2009-04-05	arm: add ARM support to M5	Stephen Hines