gem5 - gem5

Age	Commit message (Collapse)	Author
2010-08-23	ARM: Add system for ARM/Linux and bootstrapping	Ali Saidi

2010-06-02	ARM: Get rid of the binary dumping function in utility.hh.	Gabe Black

2010-06-02	ARM: Make sure the upc is zeroed when vectoring to a fault.	Gabe Black

2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi

2010-06-02	ARM: Implement and update the DFSR and IFSR registers on faults.	Gabe Black

2010-06-02	ARM: Set CPSR.E to SCTLR.EE on faults.	Gabe Black

2010-06-02	ARM: Zero the micropc when vectoring to a fault.	Gabe Black

2010-06-02	ARM: Trigger system calls from the SupervisorCall invoke method.	Gabe Black
	This simplifies the decoder slightly, and makes the system call mechanism very slightly more realistic.
2010-06-02	ARM: Rework how unrecognized/unimplemented instructions are handled.	Gabe Black
	Instead of panic immediately when these instructions are executed, an UndefinedInstruction fault is returned. In FS mode (not currently implemented), this is the fault that should, to my knowledge, be triggered in these situations and should be handled using the normal architected mechanisms. In SE mode, the fault causes a panic when it's invoked that gives the same information as the instruction did. When/if support for speculative execution of ARM is supported, this will allow a mispeculated and unrecognized and/or unimplemented instruction from causing a panic. Only once the instruction is going to be committed will the fault be invoked, triggering the panic.
2010-06-02	ARM: Track the current ISA mode using the PC.	Gabe Black

2009-11-10	ARM: Implement fault classes.	Gabe Black
	Implement some fault classes using the curriously recurring template pattern, similar to SPARCs.
2009-07-08	Registers: Eliminate the ISA defined RegFile class.	Gabe Black

2009-04-05	arm: add ARM support to M5	Stephen Hines