summaryrefslogtreecommitdiff
path: root/src/arch/arm/faults.hh
AgeCommit message (Expand)Author
2019-04-29arch-arm: Faults DebugFlag now printing inst opcode if availableGiacomo Travaglini
2018-11-28arch-arm: Add missing template declarationNikos Nikoleris
2018-11-07arch-arm: ArmSystem::resetAddr64 renamed to be used in AArch32Giacomo Travaglini
2018-06-06arch-arm: Adjust breakpoint EC depending on source stateAndreas Sandberg
2018-03-08arch-arm: Fix FSC generation in AbortFaultGiacomo Travaglini
2018-03-08arch-arm: Introduce update method in ArmFault classGiacomo Travaglini
2018-03-08arch-arm: Fix PCAlignmentFault routing to HypervisorGiacomo Travaglini
2018-02-13sim: Make Stats truly non-copy-constructibleRekai Gonzalez-Alberquilla
2018-02-08arch-arm: Fixed error in choosing vector offsetChuan Zhu
2018-02-08arch-arm: Handle route to EL2 in Supervisor TrapChuan Zhu
2017-12-21arch-arm: Hyp routed undef fault need to change its syndromeGiacomo Travaglini
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-22arch-arm: Add support for the brk instructionAndreas Sandberg
2017-11-15arch-arm: Removing FlushPipe fault, using SquashAfterGiacomo Travaglini
2017-08-30arch-arm: Add missing override keywords in fault.hhAndreas Sandberg
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
2017-04-03arm: fix template instantiation warning in clangMatteo Andreozzi
2016-08-02arm: Add AArch64 hypervisor call instruction 'hvc'Dylan Johnson
2016-01-11scons: Enable -Wextra by defaultAndreas Hansson
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-09-27arch: Use const StaticInstPtr references where possibleAndreas Hansson
2014-04-17arm: Make sure UndefinedInstructions are properly initializedAli Saidi
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2011-11-02SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.Gabe Black
2011-09-27Faults: Replace calls to genMachineCheckFault with M5PanicFault.Gabe Black
2011-09-13LSQ: Only trigger a memory violation with a load/load if the value changes.Ali Saidi
2011-08-19Fix bugs due to interaction between SEV instructions and O3 pipelineGeoffrey Blake
2011-04-15includes: sort all includesNathan Binkert
2011-04-04ARM: Fix table walk going on while ASID changes errorAli Saidi
2011-01-18O3: Fixes the way prefetches are handled inside the iew unit.Matt Horsnell
2011-01-03Make commenting on close namespace brackets consistent.Steve Reinhardt
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-08-25ARM: Adding a bogus fault that does nothing.Min Kyu Jeong
2010-08-25ARM: Implement CPACR register and return Undefined Instruction when FP access...Gabe Black
2010-08-23ARM: Make sure that software prefetch instructions can't change the state of ...Gene Wu
2010-08-23ARM: adding genMachineCheckFault() stub for ARM that doesn't panicMin Kyu Jeong
2010-08-23ARM: DFSR status value for sync external data abort is expected to be 0x8 in ...Gene Wu
2010-06-02ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.Ali Saidi
2010-06-02ARM: Implement ARM CPU interruptsAli Saidi
2010-06-02ARM: Implement and update the DFSR and IFSR registers on faults.Gabe Black
2010-06-02ARM: Trigger system calls from the SupervisorCall invoke method.Gabe Black
2010-06-02ARM: Rework how unrecognized/unimplemented instructions are handled.Gabe Black
2009-11-10ARM: Implement fault classes.Gabe Black
2009-04-05arm: add ARM support to M5Stephen Hines