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path: root/src/arch/arm/insts/macromem.hh
AgeCommit message (Expand)Author
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-23ARM: Improve printing of uop disassembly.Min Kyu Jeong
2010-06-02ARM: Add comments to the classes in macromem.hh.Gabe Black
2010-06-02ARM: Make sure macroops aren't interrupted midinstruction.Gabe Black
2010-06-02ARM: Implement the V7 version of alignment checking.Gabe Black
2010-06-02ARM: Add base classes for VFP load/store multiple.Gabe Black
2010-06-02ARM: Move the macro mem constructor out of the isa desc.Gabe Black
2010-06-02ARM: Reimplement load/store multiple external to the decoder.Gabe Black
2010-06-02ARM: Eliminate decoding for the very deprecated FPA instructions.Gabe Black
2009-11-08ARM: Support forcing load/store multiple to use user registers.Gabe Black
2009-07-08ARM: Move the memory microops out of the decoder and into the ISA desc.Gabe Black
2009-07-08ARM: Move the integer microops out of the decoder and into the ISA desc.Gabe Black
2009-07-08ARM: Get rid of the MemAcc and EAComp static insts.Gabe Black
2009-06-21ARM: Simplify the ISA desc by pulling some classes out of it.Gabe Black