gem5 - gem5

Age	Commit message (Expand)	Author
2011-03-17	ARM: Fix RFE macrop.	Matt Horsnell
2010-11-08	ARM: Make all ARM uops delayed commit.	Ali Saidi
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-08-25	ARM: Use fewer micro-ops for register update loads if possible.	Gene WU
2010-08-25	ARM: Implement all ARM SIMD instructions.	Gabe Black
2010-08-23	ARM: Improve printing of uop disassembly.	Min Kyu Jeong
2010-06-02	ARM: Add comments to the classes in macromem.hh.	Gabe Black
2010-06-02	ARM: Make sure macroops aren't interrupted midinstruction.	Gabe Black
2010-06-02	ARM: Implement the V7 version of alignment checking.	Gabe Black
2010-06-02	ARM: Add base classes for VFP load/store multiple.	Gabe Black
2010-06-02	ARM: Move the macro mem constructor out of the isa desc.	Gabe Black
2010-06-02	ARM: Reimplement load/store multiple external to the decoder.	Gabe Black
2010-06-02	ARM: Eliminate decoding for the very deprecated FPA instructions.	Gabe Black
2009-11-08	ARM: Support forcing load/store multiple to use user registers.	Gabe Black
2009-07-08	ARM: Move the memory microops out of the decoder and into the ISA desc.	Gabe Black
2009-07-08	ARM: Move the integer microops out of the decoder and into the ISA desc.	Gabe Black
2009-07-08	ARM: Get rid of the MemAcc and EAComp static insts.	Gabe Black
2009-06-21	ARM: Simplify the ISA desc by pulling some classes out of it.	Gabe Black