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path: root/src/arch/arm/insts/mem.hh
AgeCommit message (Expand)Author
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2011-03-17ARM: Fix RFE macrop.Matt Horsnell
2011-01-18ARM: fix mismatched new/delete.Ali Saidi
2010-11-15ARM: Use the correct delete operator for RFEAli Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
2010-06-02ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.Gabe Black
2010-06-02ARM: Add a base class for SRS.Gabe Black
2010-06-02ARM: Implement the strex instructions.Gabe Black
2010-06-02ARM: Add a base class for the RFE instruction.Gabe Black
2010-06-02ARM: Explicitly keep track of the second destination for double loads/stores.Gabe Black
2010-06-02ARM: Implement the swp and swpb instructions.Gabe Black
2010-06-02ARM: Remove the special naming for the new memory instructions.Gabe Black
2010-06-02ARM: Eliminate the old memory formats which are no longer used.Gabe Black
2010-06-02ARM: Implement a new set of base classes for non macro memory instructions.Gabe Black
2009-07-08ARM: Improve memory instruction disassembly.Gabe Black
2009-07-08ARM: Get rid of the MemAcc and EAComp static insts.Gabe Black
2009-07-08ARM: Add an AddrMode2 format for memory instructions that use address mode 2.Gabe Black
2009-07-08ARM: Add an AddrMode3 format for memory instructions that use address mode 3.Gabe Black
2009-06-21ARM: Simplify the ISA desc by pulling some classes out of it.Gabe Black