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path: root/src/arch/arm/insts/misc.hh
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2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
Another churn to clean up undefined behaviour, mostly ARM, but some parts also touching the generic part of the code base. Most of the fixes are simply ensuring that proper intialisation. One of the more subtle changes is the return type of the sign-extension, which is changed to uint64_t. This is to avoid shifting negative values (undefined behaviour) in the ISA code.
2014-10-01arm: More UBSan cleanups after additional full-system runsAndreas Hansson
Some incorrect casting to IntRegIndex, and a few uninitialized members in the i8254xGBe device.
2014-09-27arm: Fixed undefined behaviours identified by gccAndreas Hansson
This patch fixes the runtime errors highlighted by the undefined behaviour sanitizer. In the end there were two issues. First, when rotating an immediate, we ended up shifting an uint32_t by 32 in some cases. This case is fixed by checking for a rotation by 0 positions. Second, the Mrc15 and Mcr15 are operating on an IntReg and a MiscReg, but we used the type RegRegImmOp and passed a MiscRegIndex as an IntRegIndex. This issue is resolved by introducing a MiscRegRegImmOp and RegMiscRegImmOp with the appropriate types. With these fixes there are no runtime errors identified for the full ARM regressions.
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64 kernel you are restricted to AArch64 user-mode binaries. This will be addressed in a later patch. Note: Virtualization is only supported in AArch32 mode. This will also be fixed in a later patch. Contributors: Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation) Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation) Mbou Eyole (AArch64 NEON, validation) Ali Saidi (AArch64 Linux support, code integration, validation) Edmund Grimley-Evans (AArch64 FP) William Wang (AArch64 Linux support) Rene De Jong (AArch64 Linux support, performance opt.) Matt Horsnell (AArch64 MP, validation) Matt Evans (device models, code integration, validation) Chris Adeniyi-Jones (AArch64 syscall-emulation) Prakash Ramrakhyani (validation) Dam Sunwoo (validation) Chander Sudanthi (validation) Stephan Diestelhorst (validation) Andreas Hansson (code integration, performance opt.) Eric Van Hensbergen (performance opt.) Gabe Black
2010-06-02ARM: Make undefined instructions obey predication.Gabe Black
2010-06-02ARM: Add a new RegImmOp base class.Gabe Black
2010-06-02ARM: Add a RegRegImmOp base class.Gabe Black
2010-06-02ARM: Widen the immediate fields in the misc instruction classes.Gabe Black
2010-06-02ARM: Make a base class for instructions that use only an immediate.Gabe Black
2010-06-02ARM: Rename the RevOp base class to something more generic.Gabe Black
2010-06-02ARM: Add a register, immediate, immediate to register base for [su]bfx.Gabe Black
2010-06-02ARM: Add a base class to support usada8.Gabe Black
2010-06-02ARM: Add a base class for the sel instruction.Gabe Black
2010-06-02ARM: Add a base class for extend and add instructions.Gabe Black
2010-06-02ARM: Generalize the saturation instruction bases for use in other instructions.Gabe Black
2010-06-02ARM: Implement base classes for the saturation instructions.Gabe Black
2010-06-02ARM: Add base classes suitable for the REV* instructions.Gabe Black
2010-06-02ARM: Define versions of MSR and MRS outside the decoder.Gabe Black