gem5 - gem5

Age	Commit message (Expand)	Author
2014-04-29	arm: use condition code registers for ARM ISA	Curtis Dunham
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2013-10-15	cpu: add a condition-code register class	Yasuko Eckert
2013-10-15	cpu: clean up architectural register classification	Steve Reinhardt
2011-04-15	includes: sort all includes	Nathan Binkert
2010-06-02	ARM: Don't rely on undefined behavior to get arithmetic right shift.	Gabe Black
2010-06-02	ARM: Replace the interworking branch base class with a special operand.	Gabe Black
2010-06-02	ARM: Get rid of unnecessary flag calculating functions.	Gabe Black
2010-06-02	ARM: Implement disassembly for the new data processing classes.	Gabe Black
2010-06-02	ARM: Move the modified_imm function from all ARM instructions to just data pr...	Gabe Black
2010-06-02	ARM: Add a .w to the disassembly of 32 bit thumb instructions.	Gabe Black
2010-06-02	ARM: Replace the "never" condition with the "unconditional" condition.	Gabe Black
2010-06-02	ARM: Add a function to decode 32 bit thumb immediate values.	Gabe Black
2010-06-02	ARM: Add a new base class for instructions that can do an interworking branch.	Gabe Black
2009-11-17	ARM: Begin implementing CP15	Ali Saidi
2009-11-04	build: fix compile problems pointed out by gcc 4.4	Nathan Binkert
2009-07-08	ARM: Tune up predicated instruction decoding.	Gabe Black
2009-07-01	ARM: Use the new DataOp format to simplify the decoder.	Gabe Black
2009-06-27	ARM: Show more information when disassembling data processing intstructions.	Gabe Black
2009-06-27	ARM: Show branch targets relative to the nearest symbol.	Gabe Black
2009-06-27	ARM: Write a function for printing mnemonics and predicates.	Gabe Black
2009-06-26	ARM: Fill out the printReg function.	Gabe Black
2009-06-21	ARM: Simplify some utility functions.	Gabe Black
2009-06-21	ARM: Move util functions out of the isa desc.	Gabe Black
2009-06-21	ARM: Simplify the ISA desc by pulling some classes out of it.	Gabe Black