gem5 - gem5

Age	Commit message (Expand)	Author
2010-06-02	ARM: Mark some ARM static inst functions as inline.	Gabe Black
2010-06-02	ARM: Decode to specialized conditional/unconditional versions of instructions.	Gabe Black
2010-06-02	ARM: Make undefined instructions obey predication.	Gabe Black
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi
2010-06-02	ARM: Implement conversion to/from half precision.	Gabe Black
2010-06-02	ARM: Clean up VFP	Gabe Black
2010-06-02	ARM: Clean up the implementation of the VFP instructions.	Gabe Black
2010-06-02	ARM: Fix double precision load/store multiple decrement.	Gabe Black
2010-06-02	ARM: Fix vcvtr so that it uses the rounding mode in the FPSCR.	Gabe Black
2010-06-02	ARM: Compensate for ARM's underflow coming from -before- rounding, but x86's ...	Gabe Black
2010-06-02	ARM: Implement flush to zero for destinations as well.	Gabe Black
2010-06-02	ARM: Fix up nans to match ARM's expected behavior.	Gabe Black
2010-06-02	ARM: Implement flush to zero mode for VFP, and clean up some corner cases.	Gabe Black
2010-06-02	ARM: Add barriers that make sure FP operations happen where they're supposed to.	Gabe Black
2010-06-02	ARM: Implement the floating/fixed point VCVT instructions.	Gabe Black
2010-06-02	ARM: Add code to extract and record VFP exceptions.	Gabe Black
2010-06-02	ARM: Add support for VFP vector mode.	Gabe Black
2010-06-02	ARM: Introduce new VFP base classes that are optionally microops.	Gabe Black
2010-06-02	ARM: Implement the VFP version of vmul.	Gabe Black
2010-06-02	ARM: Make sure macroops aren't interrupted midinstruction.	Gabe Black
2010-06-02	ARM: Fix the implementation of the VFP ldm and stm macroops.	Gabe Black
2010-06-02	ARM: Add a new RegImmOp base class.	Gabe Black
2010-06-02	ARM: Add a RegRegImmOp base class.	Gabe Black
2010-06-02	ARM: Widen the immediate fields in the misc instruction classes.	Gabe Black
2010-06-02	ARM: Add a function to decode VFP modified immediate constants.	Gabe Black
2010-06-02	ARM: Add a function to decode SIMD modified immediate constants.	Gabe Black
2010-06-02	ARM: Ignore writing a bad mode to CPSR with MSR.	Gabe Black
2010-06-02	ARM: Implement the SRS instruction.	Gabe Black
2010-06-02	ARM: Add a base class for SRS.	Gabe Black
2010-06-02	ARM: Allow flattening into any mode.	Gabe Black
2010-06-02	ARM: Make a base class for instructions that use only an immediate.	Gabe Black
2010-06-02	ARM: Implement the strex instructions.	Gabe Black
2010-06-02	ARM: Respect the E bit of the CPSR when doing loads and stores.	Gabe Black
2010-06-02	ARM: Implement the V7 version of alignment checking.	Gabe Black
2010-06-02	ARM: Add a base class for the RFE instruction.	Gabe Black
2010-06-02	ARM: Squash the low order bits of the PC when performing a regular branch.	Gabe Black
2010-06-02	ARM: Fix the implementation of BX to work in thumbEE mode.	Gabe Black
2010-06-02	ARM: Explicitly keep track of the second destination for double loads/stores.	Gabe Black
2010-06-02	ARM: Rename the RevOp base class to something more generic.	Gabe Black
2010-06-02	ARM: Add a register, immediate, immediate to register base for [su]bfx.	Gabe Black
2010-06-02	ARM: Add a base class to support usada8.	Gabe Black
2010-06-02	ARM: Add a base class for the sel instruction.	Gabe Black
2010-06-02	ARM: Add a base class for extend and add instructions.	Gabe Black
2010-06-02	ARM: Generalize the saturation instruction bases for use in other instructions.	Gabe Black
2010-06-02	ARM: Implement the saturation instructions.	Gabe Black
2010-06-02	ARM: Implement base classes for the saturation instructions.	Gabe Black
2010-06-02	ARM: Implement the unsigned saturating instructions.	Gabe Black
2010-06-02	ARM: Add base classes suitable for the REV* instructions.	Gabe Black
2010-06-02	ARM: Implement the swp and swpb instructions.	Gabe Black
2010-06-02	ARM: Define versions of MSR and MRS outside the decoder.	Gabe Black