| Age | Commit message (Expand) | Author |
|---|
| 2017-12-21 | arch-arm: Fixed WFE/WFI trapping behaviour | Giacomo Travaglini |
| 2017-12-21 | arch-arm: Fix StaticInst encoding() method | Giacomo Travaglini |
| 2017-12-19 | arch-arm: Instruction size methods in StaticInst class | Giacomo Travaglini |
| 2017-12-05 | arm: Add support for the dc {civac, cvac, cvau, ivac} instr | Nikos Nikoleris |
| 2017-12-05 | arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions | Nikos Nikoleris |
| 2017-11-21 | arch-arm: Fix MCR/MRC disassemble | Giacomo Travaglini |
| 2017-11-21 | arch-arm: Fix MSR/MRS disassemble | Giacomo Travaglini |
| 2017-11-15 | arch-arm: Writes to DCCMVAC shouldn't flush pipeline | Giacomo Travaglini |
| 2017-11-15 | arch-arm: Removing FlushPipe fault, using SquashAfter | Giacomo Travaglini |
| 2017-11-13 | arch-arm: Interface for the ArmStaticInst intWidth field | Giacomo Travaglini |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
| 2017-05-19 | base, sim, arch: Fix clang 5.0 warnings | Andreas Sandberg |
| 2016-11-09 | style: [patch 1/22] use /r/3648/ to reorganize includes | Brandon Potter |
| 2016-10-13 | isa,arm: Add missing AArch32 FP instructions | Mitch Hayenga |
| 2016-08-02 | arm: change instruction classes to catch hyp traps | Dylan Johnson |
| 2016-06-02 | arm: Rewrite ERET to behave according to the ARMv8 ARM | Andreas Sandberg |
| 2016-06-02 | arm: Correctly check FP/SIMD access permission in aarch32 | Andreas Sandberg |
| 2016-03-16 | arm: Fix disasm printing | Nathanael Premillieu |
| 2016-02-06 | style: fix missing spaces in control statements | Steve Reinhardt |
| 2015-11-22 | arm: Fix fplib 128-bit shift operators | Nathanael Premillieu |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2015-02-16 | arm: Merge ISA files with pseudo instructions | Andreas Sandberg |
| 2015-01-25 | arm: always set the IsFirstMicroop flag | Ali Saidi |
| 2014-12-23 | arm: Raise an alignment fault if a PC has illegal alignment | Andreas Sandberg |
| 2014-11-14 | arm: Fixes based on UBSan and static analysis | Andreas Hansson |
| 2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
| 2014-10-01 | arm: More UBSan cleanups after additional full-system runs | Andreas Hansson |
| 2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
| 2014-09-03 | arm: Make memory ops work on 64bit/128-bit quantities | Mitch Hayenga |
| 2014-09-03 | arm: Fix v8 neon latency issue for loads/stores | Mitch Hayenga |
| 2014-04-29 | arm: use condition code registers for ARM ISA | Curtis Dunham |
| 2014-03-11 | arm: remove dead code fplib mul64x64 | Curtis Dunham |
| 2014-05-09 | arm: Add branch flags onto macroops | Andrew Bardsley |
| 2014-04-23 | arm: Correctly display disassembly of vldmia/vstmia | Curtis Dunham |
| 2014-03-07 | scons: Fixes uninitialized warnings issued by clang | Mitch Hayenga |
| 2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
| 2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
| 2013-10-15 | cpu: rename *_DepTag constants to *_Reg_Base | Steve Reinhardt |
| 2013-10-15 | cpu: clean up architectural register classification | Steve Reinhardt |
| 2013-04-17 | arm: set ldr_ret_uop as conditional or unconditional control | Nathanael Premillieu |
| 2013-02-19 | scons: Fix up numerous warnings about name shadowing | Andreas Hansson |
| 2013-02-15 | ARM: Fix an issue with clang generating wrong code. | Ali Saidi |
| 2012-12-12 | arm: set movret_uop as conditional or unconditional control | Nathanael Premillieu |
| 2012-09-25 | ARM: Predict target of more instructions that modify PC. | Ali Saidi |
| 2012-04-23 | ISA: Put parser generated files in a "generated" directory. | Gabe Black |
