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Allow some loads that update the base register to use just two micro-ops. three
micro-ops are only used if the destination register matches the offset register
or the PC is the destination regsiter. If the PC is updated it needs to be
the last micro-op otherwise O3 will mispredict.
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access is disabled.
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This is to avoid condition code based dependences from effectively serializing
instructions when the instruction doesn't actually use them.
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When decrementing, the higher addressed half of a double word is at a 4 byte
smaller displacement.
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after.
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Do this by setting the delayed commit flag for all but the last microop.
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There were four bugs in these instructions. First, the loaded value was being
stored into a floating point register as floating point, changing the value as
it was transfered. Second, the meaning of the "up" bit had been reversed.
Third, the statically sized microop array wasn't bit enough for all possible
inputs. It's now dynamically sized and should always be big enough. Fourth,
the offset was stored as an unsigned 8 bit value. Negative offsets would look
like moderately large positive offsets.
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