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2010-06-02ARM: Add a comment to vfp.cc that explains the asm statements.Gabe Black
2010-06-02ARM: Add comments to the classes in macromem.hh.Gabe Black
2010-06-02ARM: Move code from vfp.hh to vfp.cc.Gabe Black
2010-06-02ARM: Make some of the trace code more compactAli Saidi
2010-06-02ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.Gabe Black
2010-06-02ARM: Get rid of the binary dumping function in utility.hh.Gabe Black
2010-06-02ARM: Get rid of the empty branch.cc.Gabe Black
2010-06-02ARM: Mark some ARM static inst functions as inline.Gabe Black
2010-06-02ARM: Decode to specialized conditional/unconditional versions of instructions.Gabe Black
This is to avoid condition code based dependences from effectively serializing instructions when the instruction doesn't actually use them.
2010-06-02ARM: Make undefined instructions obey predication.Gabe Black
2010-06-02ARM: Implement ARM CPU interruptsAli Saidi
2010-06-02ARM: Implement conversion to/from half precision.Gabe Black
2010-06-02ARM: Clean up VFPGabe Black
2010-06-02ARM: Clean up the implementation of the VFP instructions.Gabe Black
2010-06-02ARM: Fix double precision load/store multiple decrement.Gabe Black
When decrementing, the higher addressed half of a double word is at a 4 byte smaller displacement.
2010-06-02ARM: Fix vcvtr so that it uses the rounding mode in the FPSCR.Gabe Black
2010-06-02ARM: Compensate for ARM's underflow coming from -before- rounding, but x86's ↵Gabe Black
after.
2010-06-02ARM: Implement flush to zero for destinations as well.Gabe Black
2010-06-02ARM: Fix up nans to match ARM's expected behavior.Gabe Black
2010-06-02ARM: Implement flush to zero mode for VFP, and clean up some corner cases.Gabe Black
2010-06-02ARM: Add barriers that make sure FP operations happen where they're supposed to.Gabe Black
2010-06-02ARM: Implement the floating/fixed point VCVT instructions.Gabe Black
2010-06-02ARM: Add code to extract and record VFP exceptions.Gabe Black
2010-06-02ARM: Add support for VFP vector mode.Gabe Black
2010-06-02ARM: Introduce new VFP base classes that are optionally microops.Gabe Black
2010-06-02ARM: Implement the VFP version of vmul.Gabe Black
2010-06-02ARM: Make sure macroops aren't interrupted midinstruction.Gabe Black
Do this by setting the delayed commit flag for all but the last microop.
2010-06-02ARM: Fix the implementation of the VFP ldm and stm macroops.Gabe Black
There were four bugs in these instructions. First, the loaded value was being stored into a floating point register as floating point, changing the value as it was transfered. Second, the meaning of the "up" bit had been reversed. Third, the statically sized microop array wasn't bit enough for all possible inputs. It's now dynamically sized and should always be big enough. Fourth, the offset was stored as an unsigned 8 bit value. Negative offsets would look like moderately large positive offsets.
2010-06-02ARM: Add a new RegImmOp base class.Gabe Black
2010-06-02ARM: Add a RegRegImmOp base class.Gabe Black
2010-06-02ARM: Widen the immediate fields in the misc instruction classes.Gabe Black
2010-06-02ARM: Add a function to decode VFP modified immediate constants.Gabe Black
2010-06-02ARM: Add a function to decode SIMD modified immediate constants.Gabe Black
2010-06-02ARM: Ignore writing a bad mode to CPSR with MSR.Gabe Black
2010-06-02ARM: Implement the SRS instruction.Gabe Black
2010-06-02ARM: Add a base class for SRS.Gabe Black
2010-06-02ARM: Allow flattening into any mode.Gabe Black
2010-06-02ARM: Make a base class for instructions that use only an immediate.Gabe Black
2010-06-02ARM: Implement the strex instructions.Gabe Black
2010-06-02ARM: Respect the E bit of the CPSR when doing loads and stores.Gabe Black
2010-06-02ARM: Implement the V7 version of alignment checking.Gabe Black
2010-06-02ARM: Add a base class for the RFE instruction.Gabe Black
2010-06-02ARM: Squash the low order bits of the PC when performing a regular branch.Gabe Black
2010-06-02ARM: Fix the implementation of BX to work in thumbEE mode.Gabe Black
2010-06-02ARM: Explicitly keep track of the second destination for double loads/stores.Gabe Black
2010-06-02ARM: Rename the RevOp base class to something more generic.Gabe Black
2010-06-02ARM: Add a register, immediate, immediate to register base for [su]bfx.Gabe Black
2010-06-02ARM: Add a base class to support usada8.Gabe Black
2010-06-02ARM: Add a base class for the sel instruction.Gabe Black
2010-06-02ARM: Add a base class for extend and add instructions.Gabe Black