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is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
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isa.cc
Age
Commit message (
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Author
2012-07-27
ARM: fix value of MISCREG_CTR returned by readMiscReg()
Anthony Gutierrez
2012-06-05
ARM: Fix MPIDR and MIDR register implementation.
Chander Sudanthi
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-03-02
ARM: FIx a bug preventing multiple cores booting a VExpress_EMM machine.
Ali Saidi
2012-03-01
ARM: Add support for Versatile Express extended memory map
Ali Saidi
2012-03-01
ARM: Add limited CP14 support.
Matt Horsnell
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
2012-01-31
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Geoffrey Blake
2011-09-13
ARM: Implement numcpus bits in L2CTLR register.
Daniel Johnson
2011-08-19
ARM: Mark some variables uncacheable until boot all CPUs are enabled.
Ali Saidi
2011-08-19
ARM: Add support for DIV/SDIV instructions.
Ali Saidi
2011-07-15
ARM: Add two unimplemented miscellaneous registers.
Wade Walker
2011-05-13
ARM: Remove the saturating (Q) condition code from the renamed register.
Ali Saidi
2011-05-13
ARM: Better RealView/Versatile EB platform support.
Chander Sudanthi
2011-05-04
ARM: Add support for MP misc regs and broadcast flushes.
Ali Saidi
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-04
ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.
Ali Saidi
2011-04-04
ARM: Cleanup and small fixes to some NEON ops to match the spec.
William Wang
2011-04-04
ARM: Cleanup implementation of ITSTATE and put important code in PCState.
Ali Saidi
2011-03-17
ARM: Implement the Instruction Set Attribute Registers (ISAR).
Ali Saidi
2011-02-23
ARM: Reset simulation statistics when pref counters are reset.
Ali Saidi
2010-12-07
O3: Make all instructions that write a misc. register not perform the write u...
Giacomo Gabrielli
2010-11-15
ARM: Return an FailUnimp instruction when an unimplemented CP15 register is a...
Ali Saidi
2010-11-15
ARM: Cache the misc regs at the TLB to limit readMiscReg() calls.
Ali Saidi
2010-11-08
ARM: Keep the warnings to a minimum.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-10-01
ARM: Clean up use of TBit and JBit.
Ali Saidi
2010-09-13
Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
Gabe Black
2010-08-25
ARM: Set the high bits in the part number so it's considered new by some code.
Ali Saidi
2010-08-25
ARM: Fix VFP enabled checks for mem instructions
Ali Saidi
2010-08-25
ARM: Implement CPACR register and return Undefined Instruction when FP access...
Gabe Black
2010-08-23
ARM: Clean up flattening for SPSR adding
Min Kyu Jeong
2010-08-23
ARM: Get SCTLR TE bit from reset SCTLR
Gene Wu
2010-08-23
ARM: We don't currently support ThumbEE exceptions, so don't report that we do
Ali Saidi
2010-08-23
ARM: Implement some more misc registers
Ali Saidi
2010-06-03
ARM: Fix issue with m5.fast and ARM
Ali Saidi
2010-06-02
ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...
Dam Sunwoo
2010-06-02
ARM: Move the ISA "clear" function into isa.cc.
Gabe Black
2010-06-02
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Gabe Black
2010-06-02
ARM: Some TLB bug fixes.
Ali Saidi
2010-06-02
ARM: Move Miscreg functions out of isa.hh
Ali Saidi
