gem5 - gem5

Age	Commit message (Collapse)	Author
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
	Also move the "Fault" reference counted pointer type into a separate file, sim/fault.hh. It would be better to name this less similarly to sim/faults.hh to reduce confusion, but fault.hh matches the name of the type. We could change Fault to FaultPtr to match other pointer types, and then changing the name of the file would make more sense.
2010-08-25	ARM: Set the high bits in the part number so it's considered new by some code.	Ali Saidi

2010-08-25	ARM: Fix VFP enabled checks for mem instructions	Ali Saidi

2010-08-25	ARM: Implement CPACR register and return Undefined Instruction when FP ↵	Gabe Black
	access is disabled.
2010-08-23	ARM: Clean up flattening for SPSR adding	Min Kyu Jeong

2010-08-23	ARM: Get SCTLR TE bit from reset SCTLR	Gene Wu

2010-08-23	ARM: We don't currently support ThumbEE exceptions, so don't report that we do	Ali Saidi

2010-08-23	ARM: Implement some more misc registers	Ali Saidi

2010-06-03	ARM: Fix issue with m5.fast and ARM	Ali Saidi

2010-06-02	ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, ↵	Dam Sunwoo
	V2PCWUR, V2PCWUW,...)
2010-06-02	ARM: Move the ISA "clear" function into isa.cc.	Gabe Black

2010-06-02	ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.	Gabe Black

2010-06-02	ARM: Some TLB bug fixes.	Ali Saidi

2010-06-02	ARM: Move Miscreg functions out of isa.hh	Ali Saidi