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path: root/src/arch/arm/isa.hh
AgeCommit message (Expand)Author
2010-06-02ARM: Ignore attempts to disable coprocessors that aren't implemented anyway.Gabe Black
2010-06-02ARM: Allow flattening into any mode.Gabe Black
2010-06-02ARM: Make the MPUIR register report that 1 unified data region is supported.Gabe Black
2010-06-02ARM: Ignore/warn when CSSELR or CCSIDR are accessed.Gabe Black
2010-06-02ARM: Add support for the clidr register.Gabe Black
2010-06-02ARM: Implement a stub of CPACR.Gabe Black
2010-06-02ARM: Actually write the value of sctlr in ISA.clear().Gabe Black
2010-06-02ARM: Implement a function to decode CP15 registers to MiscReg indices.Gabe Black
2010-06-02ARM: Track the current ISA mode using the PC.Gabe Black
2009-11-14ARM: Hook up the moded versions of the SPSR.Gabe Black
2009-11-10ARM: Implement fault classes.Gabe Black
2009-11-08ARM: Support forcing load/store multiple to use user registers.Gabe Black
2009-11-08ARM: Add in more bits for the mon mode.Gabe Black
2009-11-08ARM: Initialize processes in user mode.Gabe Black
2009-11-08ARM: Implement the shadow registers using register flattening.Gabe Black
2009-10-17ISA: Fix compilation.Gabe Black
2009-07-27ARM: Initialize the CPSR so that we're in user mode.Gabe Black
2009-07-09ARM: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08Registers: Collapse ARM and MIPS regfile directories.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black