gem5 - gem5

Age	Commit message (Expand)	Author
2013-01-07	arch: Move the ISA object to a separate section	Andreas Sandberg
2013-01-07	arch: Make the ISA class inherit from SimObject	Andreas Sandberg
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2010-11-08	ARM: Add checkpointing support	Ali Saidi
2010-08-23	ARM: Clean up flattening for SPSR adding	Min Kyu Jeong
2010-06-02	ARM: Move the ISA "clear" function into isa.cc.	Gabe Black
2010-06-02	ARM: Some TLB bug fixes.	Ali Saidi
2010-06-02	ARM: Move Miscreg functions out of isa.hh	Ali Saidi
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi
2010-06-02	ARM: Make various bits of the FP control registers read only.	Gabe Black
2010-06-02	ARM: Make MPIDR return 0 and ignore writes.	Gabe Black
2010-06-02	ARM: Set the value of the MVFR0 and MVFR1 registers.	Gabe Black
2010-06-02	ARM: Handle accesses to TLBTR.	Gabe Black
2010-06-02	ARM: Convert the CP15 registers from MPU to MMU.	Gabe Black
2010-06-02	ARM: Add some support for wfi/wfe/yield/etc	Ali Saidi
2010-06-02	ARM: Add a traceflag to print cpsr	Ali Saidi
2010-06-02	ARM: Ignore attempts to disable coprocessors that aren't implemented anyway.	Gabe Black
2010-06-02	ARM: Allow flattening into any mode.	Gabe Black
2010-06-02	ARM: Make the MPUIR register report that 1 unified data region is supported.	Gabe Black
2010-06-02	ARM: Ignore/warn when CSSELR or CCSIDR are accessed.	Gabe Black
2010-06-02	ARM: Add support for the clidr register.	Gabe Black
2010-06-02	ARM: Implement a stub of CPACR.	Gabe Black
2010-06-02	ARM: Actually write the value of sctlr in ISA.clear().	Gabe Black
2010-06-02	ARM: Implement a function to decode CP15 registers to MiscReg indices.	Gabe Black
2010-06-02	ARM: Track the current ISA mode using the PC.	Gabe Black
2009-11-14	ARM: Hook up the moded versions of the SPSR.	Gabe Black
2009-11-10	ARM: Implement fault classes.	Gabe Black
2009-11-08	ARM: Support forcing load/store multiple to use user registers.	Gabe Black
2009-11-08	ARM: Add in more bits for the mon mode.	Gabe Black
2009-11-08	ARM: Initialize processes in user mode.	Gabe Black
2009-11-08	ARM: Implement the shadow registers using register flattening.	Gabe Black
2009-10-17	ISA: Fix compilation.	Gabe Black
2009-07-27	ARM: Initialize the CPSR so that we're in user mode.	Gabe Black
2009-07-09	ARM: Fold the MiscRegFile all the way into the ISA object.	Gabe Black
2009-07-08	Registers: Collapse ARM and MIPS regfile directories.	Gabe Black
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black