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path: root/src/arch/arm/isa/decoder
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2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64 kernel you are restricted to AArch64 user-mode binaries. This will be addressed in a later patch. Note: Virtualization is only supported in AArch32 mode. This will also be fixed in a later patch. Contributors: Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation) Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation) Mbou Eyole (AArch64 NEON, validation) Ali Saidi (AArch64 Linux support, code integration, validation) Edmund Grimley-Evans (AArch64 FP) William Wang (AArch64 Linux support) Rene De Jong (AArch64 Linux support, performance opt.) Matt Horsnell (AArch64 MP, validation) Matt Evans (device models, code integration, validation) Chris Adeniyi-Jones (AArch64 syscall-emulation) Prakash Ramrakhyani (validation) Dam Sunwoo (validation) Chander Sudanthi (validation) Stephan Diestelhorst (validation) Andreas Hansson (code integration, performance opt.) Eric Van Hensbergen (performance opt.) Gabe Black
2012-03-01ARM: Add limited CP14 support.Matt Horsnell
New kernels attempt to read CP14 what debug architecture is available. These changes add the debug registers and return that none is currently available.
2010-11-08ARM: Add support for M5 ops in the ARM ISAAli Saidi
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-06-02ARM: Decode the neon instruction space.Gabe Black
2010-06-02ARM: Move some case values out of ##included files.Gabe Black
This will help keep the high level decode together and not have it spread into the subordinate decode stuff. The ##include lines still need to be on a line by themselves, though.
2010-06-02ARM: Move some miscellaneous instructions out of the decoder to share with ↵Gabe Black
thumb.
2010-06-02ARM: Get rid of some of the old FP implementation.Gabe Black
2010-06-02ARM: Add BKPT instructionAli Saidi
--HG-- rename : src/arch/arm/isa/formats/unknown.isa => src/arch/arm/isa/formats/breakpoint.isa
2010-06-02ARM: Implement ARM CPU interruptsAli Saidi
2010-06-02ARM: Move the VFP data operation decode into a function.Gabe Black
2010-06-02ARM: Add some support for wfi/wfe/yield/etcAli Saidi
2010-06-02ARM: BXJ should be BX when there is no J supportAli Saidi
2010-06-02ARM: Fix up thumb decoding of coproc instructions.Gabe Black
2010-06-02ARM: Clean up some redundancy and fault behavior for unimplemented thumb ↵Gabe Black
MCR, MRC.
2010-06-02ARM: Make VFP load/store and 64 bit move decode correspond with CP10 and CP11.Gabe Black
2010-06-02ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) ↵Gabe Black
registers.
2010-06-02ARM: Decode the RFE instruction.Gabe Black
2010-06-02ARM: When an instruction is intentionally undefined, fault on it.Gabe Black
2010-06-02ARM: Decode the thumb32 load byte/memory hint instructions.Gabe Black
2010-06-02ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.Gabe Black
2010-06-02ARM: Replace the ARM decode of CP15 MCR and MRC instructions.Gabe Black
2010-06-02ARM: Decode the thumb versions of the mcr and mrc instructions.Gabe Black
2010-06-02ARM: Decode miscellaneous arm mode media instructions.Gabe Black
2010-06-02ARM: Decode the clz instruction.Gabe Black
2010-06-02ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.Gabe Black
2010-06-02ARM: Decode the usad8 and usada8 instructions.Gabe Black
2010-06-02ARM: Decode 32 bit thumb data processing register instructions.Gabe Black
2010-06-02ARM: Pull decoding of ARM pack, unpack, saturate and reverse instructions ↵Gabe Black
into a format.
2010-06-02ARM: Decode the swp and swpb instructions.Gabe Black
2010-06-02ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones.Gabe Black
2010-06-02ARM: Implement SVC (was SWI) outside of the decoder.Gabe Black
2010-06-02ARM: Trigger system calls from the SupervisorCall invoke method.Gabe Black
This simplifies the decoder slightly, and makes the system call mechanism very slightly more realistic.
2010-06-02ARM: Decode the scalar saturating add/subtract instructions.Gabe Black
2010-06-02ARM: Decode the parallel add and subtract instructions.Gabe Black
2010-06-02ARM: Decode unconditional ARM instructions.Gabe Black
2010-06-02ARM: Define the VFP load/store multiple instructions.Gabe Black
2010-06-02ARM: Hook the new multiply instructions into all the decoders.Gabe Black
2010-06-02ARM: Decode plain binary immediate thumb data processing instructions.Gabe Black
2010-06-02ARM: Hook the new branch instructions into the 32 bit thumb decoder.Gabe Black
2010-06-02ARM: Hook the new branch instructions into the 16 bit thumb decoder.Gabe Black
2010-06-02ARM: Hook the new branch instructions into the ARM decoder.Gabe Black
2010-06-02ARM: Implement branch instructions external to the decoder.Gabe Black
2010-06-02ARM: Hook the external data processing instructions into the Thumb decoder.Gabe Black
2010-06-02ARM: Hook the new external data processing instructions to the ARM decoder.Gabe Black
2010-06-02ARM: Hook up 32 bit thumb load/store multiple.Gabe Black
2010-06-02ARM: Hook up 16 bit thumb load/store multiple.Gabe Black
2010-06-02ARM: Reimplement load/store multiple external to the decoder.Gabe Black
--HG-- rename : src/arch/arm/isa/formats/macromem.isa => src/arch/arm/isa/insts/macromem.isa rename : src/arch/arm/isa/formats/macromem.isa => src/arch/arm/isa/templates/macromem.isa
2010-06-02ARM: Eliminate decoding for the very deprecated FPA instructions.Gabe Black
2010-06-02ARM: Make the addressing mode 3 loads/stores use the externally defined ↵Gabe Black
instructions.