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path: root/src/arch/arm/isa/formats/branch.isa
AgeCommit message (Expand)Author
2010-08-23ARM: Implement DBG instruction that doesn't do much for now.Gene Wu
2010-08-23ARM: Implement DSB, DMB, ISBGene Wu
2010-08-23ARM: Implement CLREXGene Wu
2010-08-23ARM: BX instruction can be contitional if last instruction in a IT blockGene Wu
2010-06-02ARM: Hook the misc instructions into the thumb decoder.Gabe Black
2010-06-02ARM: BXJ should be BX when there is no J supportAli Saidi
2010-06-02ARM: Decode the CPS instruction.Gabe Black
2010-06-02ARM: Make sure some undefined thumb32 instructions fault.Gabe Black
2010-06-02ARM: Decode the enterx and leavex instructions.Gabe Black
2010-06-02ARM: When an instruction is intentionally undefined, fault on it.Gabe Black
2010-06-02ARM: Decode the clz instruction.Gabe Black
2010-06-02ARM: Decode the nop instruction.Gabe Black
2010-06-02ARM: Decode MRS and MSR for thumb.Gabe Black
2010-06-02ARM: Hook SVC into the thumb decoder.Gabe Black
2010-06-02ARM: Add support for "SUBS PC, LR and related instructions".Gabe Black
2010-06-02ARM: Hook the new branch instructions into the 32 bit thumb decoder.Gabe Black
2010-06-02ARM: Hook the new branch instructions into the 16 bit thumb decoder.Gabe Black
2010-06-02ARM: Eliminate the old style branch instructions.Gabe Black
2010-06-02ARM: Hook the new branch instructions into the ARM decoder.Gabe Black
2010-06-02ARM: Get rid of the unused Jump format.Gabe Black
2009-11-08ARM: Split the condition codes out of the CPSR.Gabe Black
2009-06-24ARM: Link register is trashed by non-executed branch and link operations.Jack Whitman
2009-06-21ARM: Simplify the ISA desc by pulling some classes out of it.Gabe Black
2009-06-21ARM: Make the isa parser aware that CPSR is being used.Gabe Black
2009-06-21ARM: Pull some static code out of the isa desc and create miscregs.hh.Gabe Black
2009-04-05arm: add ARM support to M5Stephen Hines