index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
arm
/
isa
/
formats
/
branch.isa
Age
Commit message (
Expand
)
Author
2010-06-02
ARM: Decode the clz instruction.
Gabe Black
2010-06-02
ARM: Decode the nop instruction.
Gabe Black
2010-06-02
ARM: Decode MRS and MSR for thumb.
Gabe Black
2010-06-02
ARM: Hook SVC into the thumb decoder.
Gabe Black
2010-06-02
ARM: Add support for "SUBS PC, LR and related instructions".
Gabe Black
2010-06-02
ARM: Hook the new branch instructions into the 32 bit thumb decoder.
Gabe Black
2010-06-02
ARM: Hook the new branch instructions into the 16 bit thumb decoder.
Gabe Black
2010-06-02
ARM: Eliminate the old style branch instructions.
Gabe Black
2010-06-02
ARM: Hook the new branch instructions into the ARM decoder.
Gabe Black
2010-06-02
ARM: Get rid of the unused Jump format.
Gabe Black
2009-11-08
ARM: Split the condition codes out of the CPSR.
Gabe Black
2009-06-24
ARM: Link register is trashed by non-executed branch and link operations.
Jack Whitman
2009-06-21
ARM: Simplify the ISA desc by pulling some classes out of it.
Gabe Black
2009-06-21
ARM: Make the isa parser aware that CPSR is being used.
Gabe Black
2009-06-21
ARM: Pull some static code out of the isa desc and create miscregs.hh.
Gabe Black
2009-04-05
arm: add ARM support to M5
Stephen Hines