| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-03-15 | arm: Fix implicit-fallthrough warnings when building with gcc-7+ | Siddhesh Poyarekar | |
| gcc 7 onwards have additional heuristics to detect implicit fallthroughs and it fails the build with warnings for ARM as a result. There was one gcc bug[1] that I fixed but the rest are cases that gcc cannot detect due to the point at which it does the fallthrough check. Most of this patch adds __builtin_unreachable() hints in places that throw this warning to indicate to gcc that the fallthrough will never happen. The remaining cases are actually possible fallthroughs due to incorrect code running on the simulator; in which case an Unknown instruction is returned. [1] https://gcc.gnu.org/ml/gcc-patches/2018-02/msg01105.html Change-Id: I1baa9fa0ed15181c10c755c0bd777f88b607c158 Signed-off-by: Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/8541 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> | |||
| 2018-02-20 | arch-arm: Add AArch32 HLT Semihosting interface | Giacomo Travaglini | |
| AArch32 HLT instruction is now able to issue Arm Semihosting commands as the AArch64 counterpart in either Arm and Thumb mode. Change-Id: I77da73d2e6a9288c704a5f646f4447022517ceb6 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8372 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> | |||
| 2017-11-15 | arm: Add support for armv8 CRC32 instructions | Giacomo Travaglini | |
| This patch introduces the ARM A32/T32/A64 CRC Instructions, which are mandatory since ARMv8.1. The UNPREDICTABLE behaviours are implemented as follows: 1) CRC32(C)X (64 bit) instructions are decoded as Undefined in Aarch32 2) The instructions support predication in Aarch32 3) Using R15(PC) as source/dest operand is permitted in Aarch32 Change-Id: Iaf29b05874e1370c7615da79a07f111ded17b6cc Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5521 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> | |||
| 2012-03-21 | ARM: Clean up condCodes in IT blocks. | Ali Saidi | |
| 2011-11-02 | SE/FS: Get rid of FULL_SYSTEM in the ARM ISA. | Gabe Black | |
| 2010-08-23 | ARM: BX instruction can be contitional if last instruction in a IT block | Gene Wu | |
| Branches are allowed to be the last instuction in an IT block. Before it was assumed that they could not. So Branches in thumb2 were Uncond. | |||
| 2010-06-02 | ARM: Combine some redundant cases in one of the data decode functions. | Gabe Black | |
| 2010-06-02 | ARM: Hook the misc instructions into the thumb decoder. | Gabe Black | |
| 2010-06-02 | ARM: Move some miscellaneous instructions out of the decoder to share with ↵ | Gabe Black | |
| thumb. | |||
| 2010-06-02 | ARM: Implement the bkpt instruction. | Gabe Black | |
| 2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black | |
| 2010-06-02 | ARM: Decode the CPS instruction. | Gabe Black | |
| 2010-06-02 | ARM: Decode the setend instruction. | Gabe Black | |
| 2010-06-02 | ARM: Make sure some undefined thumb32 instructions fault. | Gabe Black | |
| 2010-06-02 | ARM: Decode the bfi and bfc instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the ubfx and sbfx instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode miscellaneous arm mode media instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the clz instruction. | Gabe Black | |
| 2010-06-02 | ARM: Decode the rbit instruction. | Gabe Black | |
| 2010-06-02 | ARM: Decode the nop instruction. | Gabe Black | |
| 2010-06-02 | ARM: Decode the usad8 and usada8 instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the sel instruction. | Gabe Black | |
| 2010-06-02 | ARM: Decode pkh instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the sign/zero extend instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the 8/16 bit signed/unsigned add/subtract half instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the saturation instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the signed add/subtract and subtract/add instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the unsigned 8 and 16 bit add and subtract instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the unsigned saturating instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the ssub instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the SADD8 and SADD16 instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode 32 bit thumb data processing register instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the 16 bit thumb versions of the REV* instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the ARM version of the REV* instructions. | Gabe Black | |
| 2010-06-02 | ARM: Pull decoding of ARM pack, unpack, saturate and reverse instructions ↵ | Gabe Black | |
| into a format. | |||
| 2010-06-02 | ARM: Hook up the push/pop versions of stm/ldm in thumb. | Gabe Black | |
| 2010-06-02 | ARM: Decode the scalar saturating add/subtract instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode the parallel add and subtract instructions. | Gabe Black | |
| 2010-06-02 | ARM: Add support for "SUBS PC, LR and related instructions". | Gabe Black | |
| 2010-06-02 | ARM: Implement ADR as separate from ADD. | Gabe Black | |
| 2010-06-02 | ARM: Fix when the flag bits are updated for thumb. | Gabe Black | |
| 2010-06-02 | ARM: Remove special naming for the new version of multiply. | Gabe Black | |
| 2010-06-02 | ARM: Hook the new multiply instructions into all the decoders. | Gabe Black | |
| 2010-06-02 | ARM: Decode plain binary immediate thumb data processing instructions. | Gabe Black | |
| 2010-06-02 | ARM: Hook the new branch instructions into the 16 bit thumb decoder. | Gabe Black | |
| 2010-06-02 | ARM: Remove the special naming from the new version of data processing ↵ | Gabe Black | |
| instructions. | |||
| 2010-06-02 | ARM: Hook the external data processing instructions into the Thumb decoder. | Gabe Black | |
| 2010-06-02 | ARM: Hook the new external data processing instructions to the ARM decoder. | Gabe Black | |
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