gem5 - gem5

Age	Commit message (Collapse)	Author
2011-10-31	GCC: Get everything working with gcc 4.6.1.	Gabe Black
	And by "everything" I mean all the quick regressions.
2011-05-13	ARM: Further break up condition code into NZ, C, V bits.	Ali Saidi
	Break up the condition code bits into NZ, C, V registers. These are individually written and this removes some incorrect dependencies between instructions.
2011-05-13	ARM: Break up condition codes into normal flags, saturation, and simd.	Ali Saidi
	This change splits out the condcodes from being one monolithic register into three blocks that are updated independently. This allows CPUs to not have to do RMW operations on the flags registers for instructions that don't write all flags.
2011-05-04	ARM: Fix small bug with vcvt instruction	Ali Saidi

2011-03-17	ARM: Fix small bug with VLDM/VSTM instructions.	Ali Saidi

2011-01-18	ARM: The ARM decoder should not panic when decoding undefined holes is arch.	Matt Horsnell
	This can abort simulations when the fetch unit runs ahead and speculatively decodes instructions that are off the execution path.
2010-08-25	ARM: Seperate out the renamable bits in the FPSCR.	Gabe Black

2010-08-25	ARM: Implement all ARM SIMD instructions.	Gabe Black

2010-08-23	ARM: Decode neon memory instructions.	Ali Saidi

2010-06-02	ARM: Decode the neon instruction space.	Gabe Black

2010-06-02	ARM: Detect a bad offset field for the VFP Ldm/Stm instructions in the decoder.	Gabe Black

2010-06-02	ARM: Get rid of some of the old FP implementation.	Gabe Black

2010-06-02	ARM: Implement conversion to/from half precision.	Gabe Black

2010-06-02	ARM: Even though writes to MVFR0/1 should be unpredictable, we need to make ↵	Gabe Black
	them to do nothing.
2010-06-02	ARM: Implement the version of VMRS that writes to the APSR.	Gabe Black

2010-06-02	ARM: Implement the VCMPE instruction.	Gabe Black

2010-06-02	ARM: Implement the version of VCVT float to int that rounds towards zero.	Gabe Black

2010-06-02	ARM: Implement the floating/fixed point VCVT instructions.	Gabe Black

2010-06-02	ARM: Implement the VFP version of VCMP.	Gabe Black

2010-06-02	ARM: Add support for VFP vector mode.	Gabe Black

2010-06-02	ARM: Implement VCVT between double and single width FP.	Gabe Black

2010-06-02	ARM: Implement vcvt between int and fp. Ignore rounding.	Gabe Black

2010-06-02	ARM: Consolidate the VFP register index computation code.	Gabe Black

2010-06-02	ARM: Implement the VFP negated multiplies.	Gabe Black

2010-06-02	ARM: Implement the VFP versions of VMLA and VMLS.	Gabe Black

2010-06-02	ARM: Implement the VFP version of vdiv and vsqrt.	Gabe Black

2010-06-02	ARM: Implement the VFP version of vsub.	Gabe Black

2010-06-02	ARM: Implement the VFP version of vadd.	Gabe Black

2010-06-02	ARM: Implement the VFP version of vabs.	Gabe Black

2010-06-02	ARM: Implement the VFP version of vneg.	Gabe Black

2010-06-02	ARM: Implement the VFP version of vmul.	Gabe Black

2010-06-02	ARM: Move the VFP data operation decode into a function.	Gabe Black

2010-06-02	ARM: Move the FP decode blocks into functions.	Gabe Black

2010-06-02	ARM: Decode the VSTR instruction.	Gabe Black

2010-06-02	ARM: Decode the VLDR instruction.	Gabe Black

2010-06-02	ARM: Decode all the various forms of vmov.	Gabe Black

2010-06-02	ARM: Decode the VMRS instruction.	Gabe Black

2010-06-02	ARM: Decode the VMSR instruction.	Gabe Black

2010-06-02	ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) ↵	Gabe Black
	registers.
2010-06-02	ARM: Decode the VFP load/store multiple instructions.	Gabe Black

2009-11-08	ARM: Split the condition codes out of the CPSR.	Gabe Black
	This allows those bits to be renamed while allowing the other fields to control the behavior of the processor.
2009-06-21	ARM: Remove the currently unecessary FPAOp class.	Gabe Black

2009-06-21	ARM: Make the isa parser aware that CPSR is being used.	Gabe Black

2009-06-21	ARM: Pull some static code out of the isa desc and create miscregs.hh.	Gabe Black

2009-04-05	arm: add ARM support to M5	Stephen Hines