| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-06-02 | ARM: Eliminate the old memory formats which are no longer used. | Gabe Black | |
| 2010-06-02 | ARM: Make the addressing mode 3 loads/stores use the externally defined ↵ | Gabe Black | |
| instructions. | |||
| 2010-06-02 | ARM: Decode 16 bit thumb PC relative memory instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode 16 bit thumb immediate addressed memory instructions. | Gabe Black | |
| 2010-06-02 | ARM: Decode 16 bit thumb register addressed memory instructions. | Gabe Black | |
| 2010-06-02 | ARM: Make single stores decode to the new external store instructions. | Gabe Black | |
| 2010-06-02 | ARM: Make 32 bit thumb use the new, external load instructions. | Gabe Black | |
| 2010-06-02 | ARM: Define the store instructions from outside the decoder. | Gabe Black | |
| --HG-- rename : src/arch/arm/isa/insts/ldr.isa => src/arch/arm/isa/insts/str.isa | |||
| 2010-06-02 | ARM: Define the load instructions from outside the decoder. | Gabe Black | |
| 2010-03-23 | cpu: fix exec tracing memory corruption bug | Steve Reinhardt | |
| Accessing traceData (to call setAddress() and/or setData()) after initiating a timing translation was causing crashes, since a failed translation could delete the traceData object before returning. It turns out that there was never a need to access traceData after initiating the translation, as the traced data was always available earlier; this ordering was merely historical. Furthermore, traceData->setAddress() and traceData->setData() were being called both from the CPU model and the ISA definition, often redundantly. This patch standardizes all setAddress and setData calls for memory instructions to be in the CPU models and not in the ISA definition. It also moves those calls above the translation calls to eliminate the crashes. | |||
| 2009-07-08 | ARM: Improve memory instruction disassembly. | Gabe Black | |
| 2009-07-08 | ARM: Get rid of the MemAcc and EAComp static insts. | Gabe Black | |
| 2009-07-08 | ARM: Add an AddrMode2 format for memory instructions that use address mode 2. | Gabe Black | |
| 2009-07-08 | ARM: Don't always update CPSR. | Gabe Black | |
| 2009-07-08 | ARM: Add an AddrMode3 format for memory instructions that use address mode 3. | Gabe Black | |
| 2009-06-21 | ARM: Simplify the ISA desc by pulling some classes out of it. | Gabe Black | |
| 2009-06-21 | ARM: Don't downconvert ExtMachInsts to MachInsts. | Gabe Black | |
| 2009-06-21 | ARM: Get rid of unnecessary fp_enable_checks. | Gabe Black | |
| 2009-06-21 | ARM: Make the isa parser aware that CPSR is being used. | Gabe Black | |
| 2009-06-21 | ARM: Pull some static code out of the isa desc and create miscregs.hh. | Gabe Black | |
| 2009-06-21 | ARM: Get rid of unused postacc_code. | Gabe Black | |
| 2009-04-05 | arm: add ARM support to M5 | Stephen Hines | |
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index : gem5 | |
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