gem5 - gem5

Age	Commit message (Expand)	Author
2010-08-25	ARM: Adding a bogus fault that does nothing.	Min Kyu Jeong
2010-08-23	ARM: Implement some more misc registers	Ali Saidi
2010-06-02	ARM: Implement a version of mcr and mrc that works in user mode.	Gabe Black
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi
2010-06-02	ARM: Ignore reads and writes to DCIMVAC.	Gabe Black
2010-06-02	ARM: Move the CP15 decode block into a function.	Gabe Black
2010-06-02	ARM: Warn/ignore when TLB maintenance operations are performed.	Gabe Black
2010-06-02	ARM: Convert the CP15 registers from MPU to MMU.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.	Gabe Black
2010-06-02	ARM: Ignore/warn access to the bpimva registers.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to the dccmvac register.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to icimvau.	Gabe Black
2010-06-02	ARM: Ignore/warn on ICIALLUIS.	Gabe Black
2010-06-02	ARM: Decode the unimplemented data barrier CP15 accesses.	Gabe Black
2010-06-02	ARM: Decode the unimplemented cp15 instruction barrier.	Gabe Black
2010-06-02	ARM: Ignore accesses to DCCIMVAC.	Gabe Black
2010-06-02	ARM: Warn about and ignore accesses to DCCISW.	Gabe Black
2010-06-02	ARM: Decode the thumb versions of the mcr and mrc instructions.	Gabe Black
2010-06-02	ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones.	Gabe Black
2010-06-02	ARM: Implement SVC (was SWI) outside of the decoder.	Gabe Black