gem5 - gem5

Age	Commit message (Expand)	Author
2018-06-22	arch-arm: BadMode checking if corresponding EL is implemented	Giacomo Travaglini
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2012-03-01	ARM: Add limited CP14 support.	Matt Horsnell
2010-08-23	ARM: Implement DSB, DMB, ISB	Gene Wu
2010-08-23	ARM: Implement CLREX	Gene Wu
2010-08-23	ARM: BX instruction can be contitional if last instruction in a IT block	Gene Wu
2010-07-15	ARM: Make an SRS instruction with a bad mode cause an undefined instruction f...	Gabe Black
2010-06-02	ARM: Decode the neon instruction space.	Gabe Black
2010-06-02	ARM: Make sure undefined unconditional ARM instructions decode as such.	Gabe Black
2010-06-02	ARM: Decode ARM unconditional MRC and MCR instructions.	Gabe Black
2010-06-02	ARM: Decode the unconditional version of ARM fp instructions.	Gabe Black
2010-06-02	ARM: Decode the CPS instruction.	Gabe Black
2010-06-02	ARM: Decode the SRS instruction.	Gabe Black
2010-06-02	ARM: Decode the setend instruction.	Gabe Black
2010-06-02	ARM: Decode the RFE instruction.	Gabe Black
2010-06-02	ARM: Decode the nop instruction.	Gabe Black
2010-06-02	ARM: Implemented prefetch instructions/decoding (pli, pld, pldw).	Gabe Black
2010-06-02	ARM: Decode unconditional ARM instructions.	Gabe Black