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gem5
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invisispec-1.0
invisispec-with-dift
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is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
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is-rebase12
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formats
Age
Commit message (
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Author
2010-06-02
ARM: Decode the VSTR instruction.
Gabe Black
2010-06-02
ARM: BXJ should be BX when there is no J support
Ali Saidi
2010-06-02
ARM: Decode the VLDR instruction.
Gabe Black
2010-06-02
ARM: Decode all the various forms of vmov.
Gabe Black
2010-06-02
ARM: Decode the VMRS instruction.
Gabe Black
2010-06-02
ARM: Decode the VMSR instruction.
Gabe Black
2010-06-02
ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) regis...
Gabe Black
2010-06-02
ARM: Implement the udiv instruction.
Gabe Black
2010-06-02
ARM: Implement the sdiv instruction.
Gabe Black
2010-06-02
ARM: Decode the CPS instruction.
Gabe Black
2010-06-02
ARM: Decode the SRS instruction.
Gabe Black
2010-06-02
ARM: Decode TBB and TBH.
Gabe Black
2010-06-02
ARM: Decode the setend instruction.
Gabe Black
2010-06-02
ARM: Decode the arm version of ldrexd.
Gabe Black
2010-06-02
ARM: Decode the strex instructions.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.
Gabe Black
2010-06-02
ARM: Decode the RFE instruction.
Gabe Black
2010-06-02
ARM: Make sure some undefined thumb32 instructions fault.
Gabe Black
2010-06-02
ARM: Ignore/warn access to the bpimva registers.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the dccmvac register.
Gabe Black
2010-06-02
ARM: Decode the enterx and leavex instructions.
Gabe Black
2010-06-02
ARM: When an instruction is intentionally undefined, fault on it.
Gabe Black
2010-06-02
ARM: Decode the thumb version of the ldrd and strd instructions.
Gabe Black
2010-06-02
ARM: Explicitly keep track of the second destination for double loads/stores.
Gabe Black
2010-06-02
ARM: Decode the thumb32 load byte/memory hint instructions.
Gabe Black
2010-06-02
ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to icimvau.
Gabe Black
2010-06-02
ARM: Ignore/warn on ICIALLUIS.
Gabe Black
2010-06-02
ARM: Decode the unimplemented data barrier CP15 accesses.
Gabe Black
2010-06-02
ARM: Decode the unimplemented cp15 instruction barrier.
Gabe Black
2010-06-02
ARM: Ignore accesses to DCCIMVAC.
Gabe Black
2010-06-02
ARM: Warn about and ignore accesses to DCCISW.
Gabe Black
2010-06-02
ARM: Decode the thumb versions of the mcr and mrc instructions.
Gabe Black
2010-06-02
ARM: Decode the bfi and bfc instructions.
Gabe Black
2010-06-02
ARM: Decode the ubfx and sbfx instructions.
Gabe Black
2010-06-02
ARM: Decode miscellaneous arm mode media instructions.
Gabe Black
2010-06-02
ARM: Decode the clz instruction.
Gabe Black
2010-06-02
ARM: Decode the rbit instruction.
Gabe Black
2010-06-02
ARM: Decode the nop instruction.
Gabe Black
2010-06-02
ARM: Decode the ldrex instruction.
Gabe Black
2010-06-02
ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.
Gabe Black
2010-06-02
ARM: Decode the usad8 and usada8 instructions.
Gabe Black
2010-06-02
ARM: Decode the sel instruction.
Gabe Black
2010-06-02
ARM: Decode pkh instructions.
Gabe Black
2010-06-02
ARM: Decode the sign/zero extend instructions.
Gabe Black
2010-06-02
ARM: Decode the 8/16 bit signed/unsigned add/subtract half instructions.
Gabe Black
2010-06-02
ARM: Decode the saturation instructions.
Gabe Black
2010-06-02
ARM: Decode the signed add/subtract and subtract/add instructions.
Gabe Black
2010-06-02
ARM: Decode the unsigned 8 and 16 bit add and subtract instructions.
Gabe Black
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