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2010-06-02
ARM: Implement VCVT between double and single width FP.
Gabe Black
2010-06-02
ARM: Implement vcvt between int and fp. Ignore rounding.
Gabe Black
2010-06-02
ARM: Consolidate the VFP register index computation code.
Gabe Black
2010-06-02
ARM: Implement the VFP negated multiplies.
Gabe Black
2010-06-02
ARM: Implement the VFP versions of VMLA and VMLS.
Gabe Black
2010-06-02
ARM: Implement the VFP version of vdiv and vsqrt.
Gabe Black
2010-06-02
ARM: Implement the VFP version of vsub.
Gabe Black
2010-06-02
ARM: Implement the VFP version of vadd.
Gabe Black
2010-06-02
ARM: Implement the VFP version of vabs.
Gabe Black
2010-06-02
ARM: Implement the VFP version of vneg.
Gabe Black
2010-06-02
ARM: Implement the VFP version of vmul.
Gabe Black
2010-06-02
ARM: Move the VFP data operation decode into a function.
Gabe Black
2010-06-02
ARM: Decode ARM unconditional MRC and MCR instructions.
Gabe Black
2010-06-02
ARM: Move the CP15 decode block into a function.
Gabe Black
2010-06-02
ARM: Decode the unconditional version of ARM fp instructions.
Gabe Black
2010-06-02
ARM: Move the FP decode blocks into functions.
Gabe Black
2010-06-02
ARM: Warn/ignore when TLB maintenance operations are performed.
Gabe Black
2010-06-02
ARM: Convert the CP15 registers from MPU to MMU.
Gabe Black
2010-06-02
ARM: Decode the VSTR instruction.
Gabe Black
2010-06-02
ARM: BXJ should be BX when there is no J support
Ali Saidi
2010-06-02
ARM: Decode the VLDR instruction.
Gabe Black
2010-06-02
ARM: Decode all the various forms of vmov.
Gabe Black
2010-06-02
ARM: Decode the VMRS instruction.
Gabe Black
2010-06-02
ARM: Decode the VMSR instruction.
Gabe Black
2010-06-02
ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) ↵
Gabe Black
registers.
2010-06-02
ARM: Implement the udiv instruction.
Gabe Black
2010-06-02
ARM: Implement the sdiv instruction.
Gabe Black
2010-06-02
ARM: Decode the CPS instruction.
Gabe Black
2010-06-02
ARM: Decode the SRS instruction.
Gabe Black
2010-06-02
ARM: Decode TBB and TBH.
Gabe Black
2010-06-02
ARM: Decode the setend instruction.
Gabe Black
2010-06-02
ARM: Decode the arm version of ldrexd.
Gabe Black
2010-06-02
ARM: Decode the strex instructions.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.
Gabe Black
2010-06-02
ARM: Decode the RFE instruction.
Gabe Black
2010-06-02
ARM: Make sure some undefined thumb32 instructions fault.
Gabe Black
2010-06-02
ARM: Ignore/warn access to the bpimva registers.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the dccmvac register.
Gabe Black
2010-06-02
ARM: Decode the enterx and leavex instructions.
Gabe Black
2010-06-02
ARM: When an instruction is intentionally undefined, fault on it.
Gabe Black
2010-06-02
ARM: Decode the thumb version of the ldrd and strd instructions.
Gabe Black
2010-06-02
ARM: Explicitly keep track of the second destination for double loads/stores.
Gabe Black
2010-06-02
ARM: Decode the thumb32 load byte/memory hint instructions.
Gabe Black
2010-06-02
ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to icimvau.
Gabe Black
2010-06-02
ARM: Ignore/warn on ICIALLUIS.
Gabe Black
2010-06-02
ARM: Decode the unimplemented data barrier CP15 accesses.
Gabe Black
These are CP15DSB (Data Synchronization Barrier), and CP15DMB (Data Memory Barrier).
2010-06-02
ARM: Decode the unimplemented cp15 instruction barrier.
Gabe Black
2010-06-02
ARM: Ignore accesses to DCCIMVAC.
Gabe Black
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