Age | Commit message (Expand) | Author |
2019-08-21 | arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0 | Ciro Santilli |
2019-08-21 | arch-arm: Fix implicit fallthrough build errors | Chun-Chen TK Hsu |
2019-08-12 | arch-arm: Added LD/ST<op> atomic instruction family and SWP instrs | Jordi Vaquero |
2019-08-12 | arch-arm: Adding CAS/CASP AMO instr including new TypedAtomic func | Jordi Vaquero |
2019-08-05 | arch-arm: Implement ARMv8.1-PAN, Privileged access never | Giacomo Travaglini |
2019-08-05 | arch-arm: Rewrite MSR immediate instruction class | Giacomo Travaglini |
2019-07-27 | arch-arm: Add SVE LD1RQ[BHWD] | Javier Setoain |
2019-07-27 | arch-arm: Fix decoding for SVE memory instructions | AdriĆ Armejach |
2019-07-27 | arch-arm: Add support for SVE load/store structures | Javier Setoain |
2019-07-18 | arch-arm: Add first-/non-faulting load instructions | Gabor Dozsa |
2019-06-10 | arch-arm: implement VMINNM scalar thumb | Ciro Santilli |
2019-05-31 | arm: Fix decoding of CRC32 instructions in thumb32 | Chun-Chen TK Hsu |
2019-05-31 | arch-arm: Treat SVE prefetch instructions as no-ops | Giacomo Gabrielli |
2019-05-30 | arch-arm: Add initial support for SVE gather/scatter loads/stores | Giacomo Gabrielli |
2019-05-17 | arch-arm: implement VMINNM and VMAXNM scalar version | Ciro Santilli |
2019-05-17 | arch-arm: implement VMINNM and VMAXNM SIMD version | Ciro Santilli |
2019-05-17 | arch-arm: rename operands to match spec in isa/formats/fp.isa | Ciro Santilli |
2019-05-11 | arch-arm: Add initial support for SVE contiguous loads/stores | Giacomo Gabrielli |
2019-03-25 | arch-arm: Add missing fall-through defaults | Javier Setoain |
2019-03-14 | arch-arm,cpu: Add initial support for Arm SVE | Giacomo Gabrielli |
2019-03-11 | arch-arm: Fixing implicit fallthrough build errors | Ryan Gambord |
2019-03-01 | arch-arm: implement floating point aarch32 VCVTA family | Ciro Santilli |
2019-01-23 | arch-arm: Implement LoadAcquire/StoreRelease in AArch32 | Giacomo Travaglini |
2019-01-23 | arch-arm: Remove SWP and SWPB instructions | Giacomo Travaglini |
2018-10-26 | arch-arm: AArch64 Instruction for MISCREG_IMPDEF_UNIMPL | Giacomo Travaglini |
2018-10-19 | arm: treat aarch64 hints as NOPs instead of panic | Ciro Santilli |
2018-10-19 | arm: update hint instruction decoding to match ARMv8.5 | Ciro Santilli |
2018-10-09 | arch-arm: AArch64 Crypto AES | Giacomo Travaglini |
2018-10-09 | arch-arm: AArch64 Crypto SHA | Giacomo Travaglini |
2018-10-09 | arch-arm: AArch32 Crypto AES | Matt Horsnell |
2018-10-09 | arch-arm: AArch32 Crypto SHA | Matt Horsnell |
2018-10-02 | arch-arm: Add FP16 support introduced by Armv8.2-A | Edmund Grimley Evans |
2018-08-10 | arm: Add support for RCpc load-acquire instructions (ARMv8.3) | Giacomo Gabrielli |
2018-06-22 | arch-arm: AArch32 execution triggering AArch64 SW Break | Giacomo Travaglini |
2018-06-22 | arch-arm: BadMode checking if corresponding EL is implemented | Giacomo Travaglini |
2018-06-14 | arch-arm: Add Illegal Execution flag to PCState | Giacomo Travaglini |
2018-05-29 | arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP | Giacomo Travaglini |
2018-04-19 | arch-arm: Change disassemble when MSR to UNKNOWN register | Giacomo Travaglini |
2018-04-10 | arch-arm: Fix mrc,mcr to cop14 disassemble | Giacomo Travaglini |
2018-03-26 | arch: Fix all override related warnings. | Gabe Black |
2018-03-20 | arch, arm: Fix implicit-fallthrough GCC warnings | Chun-Chen Hsu |
2018-03-15 | arm: Fix implicit-fallthrough warnings when building with gcc-7+ | Siddhesh Poyarekar |
2018-02-20 | arch-arm: Add AArch32 HLT Semihosting interface | Giacomo Travaglini |
2018-02-20 | arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly | Giacomo Travaglini |
2018-02-19 | arch-arm: Add aarch64 semihosting support | Andreas Sandberg |
2018-02-16 | arch-arm: IMPLEMENTATION DEFINED register | Giacomo Travaglini |
2018-02-16 | arch-arm: Decode Brk64 instructions | Andreas Sandberg |
2017-12-05 | arm: Add support for the dc {civac, cvac, cvau, ivac} instr | Nikos Nikoleris |
2017-12-05 | arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions | Nikos Nikoleris |
2017-11-21 | arch-arm: Fix MSR/MRS disassemble | Giacomo Travaglini |