| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-05 | arm: Add support for the dc {civac, cvac, cvau, ivac} instr | Nikos Nikoleris |
| 2017-11-21 | arch-arm: Fix MSR/MRS disassemble | Giacomo Travaglini |
| 2017-11-15 | arm: Add support for armv8 CRC32 instructions | Giacomo Travaglini |
| 2017-10-20 | arch-arm: RBIT instruction using mirroring func | Giacomo Travaglini |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-02-21 | arm: Fix DPRINTFs with arguments in the instruction declarations | Nikos Nikoleris |
| 2016-08-02 | arm: Fix trapping to Hypervisor during MSR/MRS read/write | Dylan Johnson |
| 2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
| 2014-04-17 | arm: Make sure UndefinedInstructions are properly initialized | Ali Saidi |
| 2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
 |
index : gem5 | |
| gem5 |
| summaryrefslogtreecommitdiff |