index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
arm
/
isa
/
insts
/
macromem.isa
Age
Commit message (
Expand
)
Author
2010-08-25
ARM: Fix VFP enabled checks for mem instructions
Ali Saidi
2010-08-25
ARM: Implement all ARM SIMD instructions.
Gabe Black
2010-06-02
ARM: Decode to specialized conditional/unconditional versions of instructions.
Gabe Black
2010-06-02
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Gabe Black
2010-06-02
ARM: Implement ARM CPU interrupts
Ali Saidi
2010-06-02
ARM: Fix the implementation of the VFP ldm and stm macroops.
Gabe Black
2010-06-02
ARM: Implement the strex instructions.
Gabe Black
2010-06-02
ARM: Respect the E bit of the CPSR when doing loads and stores.
Gabe Black
2010-06-02
ARM: Make LDM that loads the PC perform an interworking branch.
Gabe Black
2010-06-02
ARM: Make ldrs into the PC and ldm exception return do interworking branches.
Gabe Black
2010-06-02
ARM: Define the VFP load/store multiple instructions.
Gabe Black
2010-06-02
ARM: Add floating point load/store microops.
Gabe Black
2010-06-02
ARM: Move the macro mem constructor out of the isa desc.
Gabe Black
2010-06-02
ARM: Make macroops panic if executed directly.
Gabe Black
2010-06-02
ARM: Reimplement load/store multiple external to the decoder.
Gabe Black