Age | Commit message (Expand) | Author |
2017-04-03 | arm: Don't panic when checking coprocessor read/write permissions | Nikos Nikoleris |
2016-02-29 | arm: Squash after returning from exceptions in v7 | Mitch Hayenga |
2015-09-30 | isa,cpu: Add support for FS SMT Interrupts | Mitch Hayenga |
2014-09-02 | arm: Don't speculatively access most miscregisters. | Akash Bagdia |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
2014-05-09 | arm: Panics in miscreg read functions can be tripped by O3 model | Geoffrey Blake |
2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
2012-03-21 | ARM: IT doesn't need to be serializing. | Geoffrey Blake |
2012-03-01 | ARM: Add limited CP14 support. | Matt Horsnell |
2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
2012-01-07 | Merge with the main repository again. | Gabe Black |
2011-12-01 | ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction . | Ali Saidi |
2011-11-02 | SE/FS: Get rid of FULL_SYSTEM in the ARM ISA. | Gabe Black |
2011-09-26 | ISA parser: Use '_' instead of '.' to delimit type modifiers on operands. | Gabe Black |
2011-08-19 | Fix bugs due to interaction between SEV instructions and O3 pipeline | Geoffrey Blake |
2011-05-13 | ARM: Construct the predicate test register for more instruction programatically. | Ali Saidi |
2011-05-13 | ARM: Further break up condition code into NZ, C, V bits. | Ali Saidi |
2011-05-13 | ARM: Remove the saturating (Q) condition code from the renamed register. | Ali Saidi |
2011-05-13 | ARM: Break up condition codes into normal flags, saturation, and simd. | Ali Saidi |
2011-05-04 | ARM: Implement WFE/WFI/SEV semantics. | Prakash Ramrakhyani |
2011-04-04 | ARM: Use CPU local lock before sending load to mem system. | Ali Saidi |
2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
2011-03-17 | ARM: Allow conditional quiesce instructions. | Ali Saidi |
2011-02-23 | ARM: Do something for ISB, DSB, DMB | Ali Saidi |
2011-02-23 | ARM: Make Noop actually decode to a noop and set it's instflags. | Ali Saidi |
2011-01-18 | O3: Fix itstate prediction and recovery. | Matt Horsnell |
2011-01-18 | ARM: Add support for moving predicated false dest operands from sources. | Ali Saidi |
2010-12-09 | ARM: Take advantage of new PCState syntax. | Gabe Black |
2010-12-07 | O3: Make all instructions that write a misc. register not perform the write u... | Giacomo Gabrielli |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
2010-10-13 | Mem: Change the CLREX flag to CLEAR_LL. | Gabe Black |
2010-10-01 | ARM: Clean up use of TBit and JBit. | Ali Saidi |
2010-08-25 | ARM: Make VMSR, RFE PC/LR etc non speculative, and serializing | Ali Saidi |
2010-08-23 | ARM: Implement DBG instruction that doesn't do much for now. | Gene Wu |
2010-08-23 | MEM: Make CLREX a first class request operation and clear locks in caches whe... | Gene Wu |
2010-08-23 | ARM: Implement CLREX init/complete acc methods | Gene Wu |
2010-08-23 | ARM: Implement DSB, DMB, ISB | Gene Wu |
2010-08-23 | ARM: Implement CLREX | Gene Wu |
2010-08-23 | ARM: mark msr/mrs instructions as SerializeBefore/After | Min Kyu Jeong |
2010-06-02 | ARM: Decode to specialized conditional/unconditional versions of instructions. | Gabe Black |
2010-06-02 | ARM: Implement a version of mcr and mrc that works in user mode. | Gabe Black |
2010-06-02 | ARM: Move some miscellaneous instructions out of the decoder to share with th... | Gabe Black |
2010-06-02 | ARM: Implement the bkpt instruction. | Gabe Black |
2010-06-02 | ARM: Make undefined instructions obey predication. | Gabe Black |
2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black |
2010-06-02 | ARM: Implement ARM CPU interrupts | Ali Saidi |
2010-06-02 | ARM: Undef instruction on invalid user CP15 access | Ali Saidi |
2010-06-02 | ARM: Implement the CPS instruction. | Gabe Black |