| Age | Commit message (Expand) | Author |
|---|
| 2011-05-13 | ARM: Construct the predicate test register for more instruction programatically. | Ali Saidi |
| 2011-05-13 | ARM: Further break up condition code into NZ, C, V bits. | Ali Saidi |
| 2011-05-13 | ARM: Remove the saturating (Q) condition code from the renamed register. | Ali Saidi |
| 2011-05-13 | ARM: Break up condition codes into normal flags, saturation, and simd. | Ali Saidi |
| 2011-05-04 | ARM: Implement WFE/WFI/SEV semantics. | Prakash Ramrakhyani |
| 2011-04-04 | ARM: Use CPU local lock before sending load to mem system. | Ali Saidi |
| 2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
| 2011-03-17 | ARM: Allow conditional quiesce instructions. | Ali Saidi |
| 2011-02-23 | ARM: Do something for ISB, DSB, DMB | Ali Saidi |
| 2011-02-23 | ARM: Make Noop actually decode to a noop and set it's instflags. | Ali Saidi |
| 2011-01-18 | O3: Fix itstate prediction and recovery. | Matt Horsnell |
| 2011-01-18 | ARM: Add support for moving predicated false dest operands from sources. | Ali Saidi |
| 2010-12-09 | ARM: Take advantage of new PCState syntax. | Gabe Black |
| 2010-12-07 | O3: Make all instructions that write a misc. register not perform the write u... | Giacomo Gabrielli |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-10-13 | Mem: Change the CLREX flag to CLEAR_LL. | Gabe Black |
| 2010-10-01 | ARM: Clean up use of TBit and JBit. | Ali Saidi |
| 2010-08-25 | ARM: Make VMSR, RFE PC/LR etc non speculative, and serializing | Ali Saidi |
| 2010-08-23 | ARM: Implement DBG instruction that doesn't do much for now. | Gene Wu |
| 2010-08-23 | MEM: Make CLREX a first class request operation and clear locks in caches whe... | Gene Wu |
| 2010-08-23 | ARM: Implement CLREX init/complete acc methods | Gene Wu |
| 2010-08-23 | ARM: Implement DSB, DMB, ISB | Gene Wu |
| 2010-08-23 | ARM: Implement CLREX | Gene Wu |
| 2010-08-23 | ARM: mark msr/mrs instructions as SerializeBefore/After | Min Kyu Jeong |
| 2010-06-02 | ARM: Decode to specialized conditional/unconditional versions of instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement a version of mcr and mrc that works in user mode. | Gabe Black |
| 2010-06-02 | ARM: Move some miscellaneous instructions out of the decoder to share with th... | Gabe Black |
| 2010-06-02 | ARM: Implement the bkpt instruction. | Gabe Black |
| 2010-06-02 | ARM: Make undefined instructions obey predication. | Gabe Black |
| 2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black |
| 2010-06-02 | ARM: Implement ARM CPU interrupts | Ali Saidi |
| 2010-06-02 | ARM: Undef instruction on invalid user CP15 access | Ali Saidi |
| 2010-06-02 | ARM: Implement the CPS instruction. | Gabe Black |
| 2010-06-02 | ARM: Define the setend instruction. | Gabe Black |
| 2010-06-02 | ARM: Implement the enterx and leavex instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement the mrc and mcr instructions. | Gabe Black |
| 2010-06-02 | ARM: Rename the RevOp base class to something more generic. | Gabe Black |
| 2010-06-02 | ARM: Implement the bfc and bfi instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement the ubfx and sbfx instructions. | Gabe Black |
| 2010-06-02 | ARM: Decode the clz instruction. | Gabe Black |
| 2010-06-02 | ARM: Implement the clz instruction. | Gabe Black |
| 2010-06-02 | ARM: Implement the rbit instruction. | Gabe Black |
| 2010-06-02 | ARM: Implement nop. | Gabe Black |
| 2010-06-02 | ARM: Implement the usad8 and usada8 instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement the sel instruction. | Gabe Black |
| 2010-06-02 | ARM: Implement zero/sign extend instructions. | Gabe Black |
| 2010-06-02 | ARM: Generalize the saturation instruction bases for use in other instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement the saturation instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement the REV* instructions. | Gabe Black |
| 2010-06-02 | ARM: Define versions of MSR and MRS outside the decoder. | Gabe Black |
